RAM.git/src/utils, branch master'RAM Acts Magically' a memory simulator supporting configurable cache levels and wayshttps://git.operationnull.com/RAM.git/atom?h=master2025-04-12T01:14:25+00:00Move source files to top-level src directory2025-04-12T01:14:25+00:00bdbdunahu@operationnull.com2025-04-12T01:14:25+00:00urn:sha1:101f0facf8002907ca6e19faabfdcf472c0c3152Add implementation functions for checking out a register.2025-03-29T16:30:54+00:00bdbdunahu@operationnull.com2025-03-29T16:30:54+00:00urn:sha1:d8e33f871bfb8dbfbad3fa0d7e1e13af5bcde830Move get_instr_fields, add all instruction mnemonics2025-03-28T23:55:04+00:00bdbdunahu@operationnull.com2025-03-28T23:55:04+00:00urn:sha1:579538d8c3240dcec1fd007a67b5ae4aaa832d3badd get_instr_fields func to parse instruction fields from raw bits2025-03-28T22:10:14+00:00bdbdunahu@operationnull.com2025-03-28T22:10:14+00:00urn:sha1:136417edd709f0e2d30931d222b658ff7dd9a5a8Instr, InstrDTO gets/sets, other structures required for decode2025-03-28T00:30:18+00:00bdbdunahu@operationnull.com2025-03-28T00:30:18+00:00urn:sha1:ab6d02361b04a18b7823aef0ff1cb0ff2a215ec2Small cleanups to up a lot of inplementation details2025-03-21T20:06:07+00:00bdbdunahu@operationnull.com2025-03-21T20:06:07+00:00urn:sha1:75f78c215131499165101a499197313ba77ea230fix lots of bugs2025-03-11T23:02:55+00:00bdbdunahu@operationnull.com2025-03-11T23:02:55+00:00urn:sha1:fb7735049f571ac45a193481e962f497b4759fa4clarify macro names, implement load in CLI, fix many display issues2025-03-11T21:24:49+00:00bdbdunahu@operationnull.com2025-03-11T21:24:49+00:00urn:sha1:256fd73b42ae7d10fe0190984d032f839a2127bdMerge remote-tracking branch 'origin/master' into bdunahu2025-03-11T21:24:37+00:00bdbdunahu@operationnull.com2025-03-11T21:24:37+00:00urn:sha1:d743af4b5df01e3a75725912bee1d00b8fe573ddTests for write line in Dram, memory address wrapping implementation and tests2025-03-11T19:24:57+00:00Siddarth-Suresh65844402+Siddarth-Suresh@users.noreply.github.com2025-03-11T19:24:57+00:00urn:sha1:21187ae663a8450553881851e8450315c8d9ca1c