diff options
Diffstat (limited to 'src')
-rw-r--r-- | src/cli/cli.cc | 14 | ||||
-rw-r--r-- | src/storage/cache.cc | 52 | ||||
-rw-r--r-- | src/storage/dram.cc | 15 | ||||
-rw-r--r-- | src/utils/utils.cc | 9 |
4 files changed, 54 insertions, 36 deletions
diff --git a/src/cli/cli.cc b/src/cli/cli.cc index a885aee..41ac57c 100644 --- a/src/cli/cli.cc +++ b/src/cli/cli.cc @@ -100,14 +100,15 @@ void Cli::help() void Cli::load(Accessor accessor, int address) { + address = wrap_address(address); const auto default_flags = std::cout.flags(); const auto default_fill = std::cout.fill(); signed int data; - // Response r = this->cache->read_word(accessor, address, data); - // std::cout << r << " to " << accessor << " reading " << address << std::endl; - // if (r == OK) - // std::cout << "\tGot:" << std::hex << data; + Response r = this->cache->read_word(accessor, address, data); + std::cout << r << " to " << accessor << " reading " << address << std::endl; + if (r == OK) + std::cout << " Got: " << std::hex << data << std::endl; std::cout.flags(default_flags); std::cout.fill(default_fill); @@ -115,8 +116,9 @@ void Cli::load(Accessor accessor, int address) void Cli::store(Accessor accessor, int data, int address) { + address = wrap_address(address); Response r = this->cache->write_word(accessor, data, address); - std::cout << r << " to " << accessor << " storing " << data << " in" + std::cout << r << " to " << accessor << " storing " << data << " in " << address << std::endl; } @@ -209,7 +211,7 @@ void Cli::initialize() if (this->cache != nullptr) delete this->cache; - Dram *d = new Dram(MEM_SIZE, MEM_DELAY); + Dram *d = new Dram(MEM_LINES, MEM_DELAY); this->cache = new Cache(d, L1_CACHE_DELAY); this->cycle = 1; } diff --git a/src/storage/cache.cc b/src/storage/cache.cc index 533d0ec..3e2a5e0 100644 --- a/src/storage/cache.cc +++ b/src/storage/cache.cc @@ -10,7 +10,7 @@ Cache::Cache(Storage *lower, int delay) { this->data = new std::vector<std::array<signed int, LINE_SIZE>>; - this->data->resize(L1_CACHE_SIZE); + this->data->resize(L1_CACHE_LINES); this->delay = delay; this->is_waiting = false; this->lower = lower; @@ -119,29 +119,31 @@ Response Cache::read_word(Accessor accessor, int address, signed int &data) void Cache::fetch_resource(int expected) { Response r = OK; + Response q; int tag, index, offset; - std::array<signed int, LINE_SIZE> actual; + std::array<signed int, LINE_SIZE> *actual; std::array<int, 2> *meta; get_bit_fields(expected, &tag, &index, &offset); meta = &this->meta.at(index); - actual = this->data->at(index); + actual = &this->data->at(index); if (meta->at(0) != tag) { + r = WAIT; // address not in cache if (meta->at(1) >= 0) { // occupant is dirty // writing line to DRam in case of dirty cache eviction - r = this->lower->write_line( - L1CACHE, actual, + q = this->lower->write_line( + L1CACHE, *actual, ((index << LINE_SPEC) + - (meta->at(0) << (L1_CACHE_SPEC + LINE_SPEC)))); - if (r == OK) { + (meta->at(0) << (L1_CACHE_LINE_SPEC + LINE_SPEC)))); + if (q == OK) { meta->at(1) = -1; } } else { - r = this->lower->read_line(L1CACHE, expected, actual); - if (r == OK) { + q = this->lower->read_line(L1CACHE, expected, *actual); + if (q == OK) { meta->at(0) = tag; } } @@ -150,9 +152,9 @@ void Cache::fetch_resource(int expected) this->is_waiting = (r == OK) ? false : true; } -std::array<std::array<int, 2>, L1_CACHE_SIZE> Cache::get_meta() const +std::array<std::array<int, 2>, L1_CACHE_LINES> Cache::get_meta() const { - std::array<std::array<int, 2>, L1_CACHE_SIZE> ret; + std::array<std::array<int, 2>, L1_CACHE_LINES> ret; std::copy(std::begin(this->meta), std::end(this->meta), std::begin(ret)); return ret; } @@ -163,24 +165,32 @@ std::ostream &operator<<(std::ostream &os, const Cache &c) const auto default_fill = std::cout.fill(); std::vector<std::array<signed int, LINE_SIZE>> data = - c.view(0, L1_CACHE_SIZE); - std::array<std::array<int, 2>, L1_CACHE_SIZE> meta = c.get_meta(); + c.view(0, L1_CACHE_LINES); + std::array<std::array<int, 2>, L1_CACHE_LINES> meta = c.get_meta(); - os << " " << std::setfill(' ') << std::setw(L1_CACHE_SPEC + 2) << "INDEX" + os << " " << std::setfill(' ') << std::setw(L1_CACHE_LINE_SPEC + 2) + << "INDEX" << " | " << std::setfill(' ') << std::setw((8 + 3) * 4 - 1) << "DATA" << " | " << std::setfill(' ') - << std::setw(MEM_SPEC - LINE_SPEC - L1_CACHE_SPEC + 2) << "TAG" + << std::setw(MEM_LINE_SPEC - L1_CACHE_LINE_SPEC + 2) << "TAG" << " | D" << std::endl; - for (int i = 0; i < L1_CACHE_SIZE; ++i) { - os << " 0b" << std::setw(L1_CACHE_SPEC) << std::bitset<L1_CACHE_SPEC>(i) - << " | "; + for (int i = 0; i < L1_CACHE_LINES; ++i) { + os << " 0b" << std::setw(L1_CACHE_LINE_SPEC) + << std::bitset<L1_CACHE_LINE_SPEC>(i) << " | "; for (int j = 0; j < LINE_SIZE; ++j) { os << "0x" << std::setfill('0') << std::setw(8) << std::hex << data.at(i).at(j) << " "; } - os << "| 0x" << std::setfill(' ') - << std::bitset<MEM_SPEC - LINE_SPEC - L1_CACHE_SPEC>(meta.at(i)[0]) - << " | " << (int)(meta.at(i)[0] >= 0) << std::endl; + os << "| 0b" << std::setfill(' '); + + if (meta.at(i)[0] < 0) + os << std::setfill('?') + << std::setw(MEM_LINE_SPEC - L1_CACHE_LINE_SPEC) << ""; + else + os << std::bitset<MEM_LINE_SPEC - L1_CACHE_LINE_SPEC>( + meta.at(i)[0]); + + os << " | " << (int)(meta.at(i)[0] >= 0) << std::endl; } std::cout.flags(default_flags); diff --git a/src/storage/dram.cc b/src/storage/dram.cc index f375a76..56eec47 100644 --- a/src/storage/dram.cc +++ b/src/storage/dram.cc @@ -6,6 +6,7 @@ #include <bitset> #include <iostream> #include <iterator> +#include <utils.h> Dram::Dram(int lines, int delay) { @@ -22,6 +23,7 @@ Dram::~Dram() { delete this->data; } void Dram::do_write(signed int data, int address) { + address = wrap_address(address); int line = address / LINE_SIZE; int word = address % LINE_SIZE; @@ -31,18 +33,21 @@ void Dram::do_write(signed int data, int address) void Dram::do_write_line( std::array<signed int, LINE_SIZE> data_line, int address) { + address = wrap_address(address); int line = address / LINE_SIZE; this->data->at(line) = data_line; } void Dram::do_read(std::array<signed int, LINE_SIZE> &data_line, int address) { + address = wrap_address(address); int line = address / LINE_SIZE; data_line = this->data->at(line); } void Dram::do_read_word(signed int &data, int address) { + address = wrap_address(address); int line = address / LINE_SIZE; int word = address % LINE_SIZE; data = this->data->at(line).at(word); @@ -136,13 +141,15 @@ std::ostream &operator<<(std::ostream &os, const Dram &d) const auto default_flags = std::cout.flags(); const auto default_fill = std::cout.fill(); - std::vector<std::array<signed int, LINE_SIZE>> data = d.view(0, MEM_SIZE); + std::vector<std::array<signed int, LINE_SIZE>> data = d.view(0, MEM_LINES); - os << " " << std::setfill(' ') << std::setw(MEM_SPEC + 2) << "INDEX" + os << " " << std::setfill(' ') << std::setw(MEM_LINE_SPEC + 2 + LINE_SPEC) + << "ADDRESS" << " | " << std::setfill(' ') << std::setw((8 + 3) * 4 - 1) << "DATA" << std::endl; - for (int i = 0; i < MEM_SIZE; ++i) { - os << " 0b" << std::setw(MEM_SPEC) << std::bitset<MEM_SPEC>(i) << " | "; + for (int i = 0; i < MEM_LINES; ++i) { + os << " 0b" << std::setw(MEM_LINE_SPEC + LINE_SPEC) << left + << std::bitset<MEM_LINE_SPEC>(i) << " | "; for (int j = 0; j < LINE_SIZE; ++j) { os << "0x" << std::setfill('0') << std::setw(8) << std::hex << data.at(i).at(j) << ' '; diff --git a/src/utils/utils.cc b/src/utils/utils.cc index f95d88f..ebbc1e9 100644 --- a/src/utils/utils.cc +++ b/src/utils/utils.cc @@ -7,9 +7,8 @@ void get_bit_fields(int address, int *tag, int *index, int *offset) { *tag = GET_MID_BITS( - address, LINE_SPEC + L1_CACHE_SPEC, - MEM_SPEC + LINE_SPEC + L1_CACHE_SPEC); - *index = GET_MID_BITS(address, LINE_SPEC, L1_CACHE_SPEC + LINE_SPEC); + address, L1_CACHE_LINE_SPEC + LINE_SPEC, MEM_WORD_SPEC); + *index = GET_MID_BITS(address, LINE_SPEC, L1_CACHE_LINE_SPEC + LINE_SPEC); *offset = GET_LS_BITS(address, LINE_SPEC); } @@ -31,7 +30,7 @@ const std::string string_format(const char *const zcFormat, ...) int wrap_address(int address) { if (address < 0){ - return ((address % MEM_SIZE) + MEM_SIZE) % MEM_SIZE; + return ((address % MEM_WORDS) + MEM_WORDS) % MEM_WORDS; } - return address % MEM_SIZE; + return address % MEM_WORDS; } |