diff options
Diffstat (limited to 'tests')
-rw-r--r-- | tests/cache.cc | 23 | ||||
-rw-r--r-- | tests/dram.cc | 47 |
2 files changed, 9 insertions, 61 deletions
diff --git a/tests/cache.cc b/tests/cache.cc index 14459b9..0b04bce 100644 --- a/tests/cache.cc +++ b/tests/cache.cc @@ -25,8 +25,7 @@ class CacheFixture { for (int i = 0; i < delay; ++i) { Response r = f(); - this->c->resolve(); - + // check response CHECK(r == expected); // check for early modifications @@ -90,8 +89,7 @@ TEST_CASE_METHOD( CHECK(r == BLOCKED); r = c->write_word(FETCH, w, 0b1); CHECK(r == WAIT); - this->c->resolve(); - + // check for early modifications actual = c->view(0, 1)[0]; REQUIRE(this->expected == this->actual); @@ -102,8 +100,7 @@ TEST_CASE_METHOD( CHECK(r == WAIT); r = c->write_word(FETCH, w, 0b1); CHECK(r == WAIT); - this->c->resolve(); - + // check for early modifications actual = c->view(0, 1)[0]; REQUIRE(this->expected == this->actual); @@ -111,11 +108,6 @@ TEST_CASE_METHOD( r = c->write_word(MEM, w, 0b0); CHECK(r == OK); - // clock cycle did NOT resolve yet! - // this fetch should not make progress - r = c->write_word(FETCH, w, 0b1); - CHECK(r == WAIT); - c->resolve(); actual = d->view(0, 1)[0]; // we do NOT write back now! @@ -132,8 +124,7 @@ TEST_CASE_METHOD( r = c->write_word(FETCH, w, 0b1); CHECK(r == OK); - c->resolve(); - + expected.at(1) = w; actual = c->view(0, 1)[0]; REQUIRE(expected == actual); @@ -161,8 +152,7 @@ TEST_CASE_METHOD( r = c->write_word(MEM, w, 0b0); CHECK(r == OK); - c->resolve(); - + expected.at(0) = w; actual = c->view(0, 1)[0]; REQUIRE(expected == actual); @@ -180,8 +170,7 @@ TEST_CASE_METHOD( // after the fetch, this cache line should be empty this->c->write_word(FETCH, w, 0b10000001); CHECK(r == OK); - c->resolve(); - + expected.at(0) = 0; actual = c->view(0, 1)[0]; CHECK(expected == actual); diff --git a/tests/dram.cc b/tests/dram.cc index c15c3de..0e97e81 100644 --- a/tests/dram.cc +++ b/tests/dram.cc @@ -23,7 +23,6 @@ class DramFixture { for (int i = 0; i < delay; ++i) { Response r = f(); - this->d->resolve(); // check response CHECK(r == expected); @@ -51,7 +50,6 @@ TEST_CASE_METHOD(DramFixture, "store 0th element in DELAY cycles", "[dram]") }); r = this->d->write_word(MEM, w, 0x0); - this->d->resolve(); CHECK(r == OK); expected.at(0) = w; @@ -75,11 +73,6 @@ TEST_CASE_METHOD( r = d->write_word(MEM, w, 0x0); REQUIRE(r == OK); - // clock cycle did NOT resolve yet! - // this fetch should not make progress - r = d->write_word(FETCH, w, 0x1); - CHECK(r == WAIT); - this->d->resolve(); expected.at(0) = w; actual = d->view(0, 1)[0]; @@ -91,7 +84,6 @@ TEST_CASE_METHOD( r = d->write_word(FETCH, w, 0x1); CHECK(r == OK); - this->d->resolve(); actual = d->view(0, 1)[0]; expected.at(1) = w; @@ -112,7 +104,6 @@ TEST_CASE_METHOD( CHECK(r == WAIT); r = this->d->write_word(FETCH, w, 0x1); CHECK(r == WAIT); - this->d->resolve(); // check for early modifications actual = d->view(0, 1)[0]; @@ -121,11 +112,6 @@ TEST_CASE_METHOD( r = d->write_word(MEM, w, 0x0); REQUIRE(r == OK); - // clock cycle did NOT resolve yet! - // this fetch should not make progress - r = d->write_word(FETCH, w, 0x1); - CHECK(r == WAIT); - this->d->resolve(); expected.at(0) = w; actual = d->view(0, 1)[0]; @@ -137,7 +123,6 @@ TEST_CASE_METHOD( r = d->write_word(FETCH, w, 0x1); CHECK(r == OK); - this->d->resolve(); actual = d->view(0, 1)[0]; expected.at(1) = w; @@ -181,11 +166,6 @@ TEST_CASE_METHOD( r = this->d->write_line(MEM, buffer, 0x0); REQUIRE(r == OK); - // clock cycle did NOT resolve yet! - // this fetch should not make progress - r = this->d->write_line(FETCH, buffer, 0x1); - CHECK(r == WAIT); - d->resolve(); expected = buffer; actual = d->view(0, 1)[0]; @@ -198,7 +178,6 @@ TEST_CASE_METHOD( r = this->d->write_line(FETCH, buffer, 0x1); CHECK(r == OK); - d->resolve(); expected = buffer; actual = d->view(0, 1)[0]; @@ -221,7 +200,6 @@ TEST_CASE_METHOD( CHECK(r == WAIT); r = d->write_line(FETCH, buffer, 0x1); CHECK(r == WAIT); - this->d->resolve(); // check for early modifications actual = d->view(0, 1)[0]; @@ -230,11 +208,6 @@ TEST_CASE_METHOD( r = d->write_line(MEM, buffer, 0x0); CHECK(r == OK); - // clock cycle did NOT resolve yet! - // this fetch should not make progress - r = d->write_line(FETCH, buffer, 0x01); - CHECK(r == WAIT); - d->resolve(); actual = d->view(0, 1)[0]; expected = buffer; @@ -247,7 +220,6 @@ TEST_CASE_METHOD( r = this->d->write_line(FETCH, buffer, 0x1); CHECK(r == OK); - d->resolve(); expected = buffer; actual = d->view(0, 1)[0]; @@ -255,7 +227,9 @@ TEST_CASE_METHOD( } TEST_CASE_METHOD( - DramFixture, "store line in DELAY cycles, read in DELAY cycles, no conflict", "[dram]") + DramFixture, + "store line in DELAY cycles, read in DELAY cycles, no conflict", + "[dram]") { Response r; signed int w; @@ -268,22 +242,18 @@ TEST_CASE_METHOD( for (i = 0; i < this->delay; ++i) { r = d->write_line(MEM, expected, addr); CHECK(r == WAIT); - d->resolve(); } r = d->write_line(MEM, expected, addr); CHECK(r == OK); - d->resolve(); for (i = 0; i < this->delay; ++i) { r = d->read_line(MEM, addr, actual); - d->resolve(); CHECK(r == WAIT); REQUIRE(expected != actual); } r = d->read_line(MEM, addr, actual); - d->resolve(); CHECK(r == OK); REQUIRE(expected == actual); @@ -308,25 +278,18 @@ TEST_CASE_METHOD( r = d->read_line(FETCH, addr, actual); CHECK(r == WAIT); - - d->resolve(); } r = d->write_line(MEM, expected, addr); CHECK(r == OK); - r = d->read_line(FETCH, addr, actual); - CHECK(r == WAIT); - d->resolve(); for (i = 0; i < this->delay; ++i) { r = d->read_line(MEM, addr, actual); - d->resolve(); CHECK(r == WAIT); REQUIRE(expected != actual); } r = d->read_line(MEM, addr, actual); - d->resolve(); CHECK(r == OK); REQUIRE(expected == actual); @@ -350,11 +313,9 @@ TEST_CASE_METHOD( for (i = 0; i < this->delay; ++i) { r = d->write_line(MEM, expected, addr); CHECK(r == WAIT); - d->resolve(); } r = d->write_line(MEM, expected, addr); CHECK(r == OK); - d->resolve(); actual = d->view(0, 1)[0]; REQUIRE(expected == actual); @@ -362,13 +323,11 @@ TEST_CASE_METHOD( for (i = 0; i < LINE_SIZE; ++i) { for (j = 0; j < this->delay; ++j) { r = d->read_word(MEM, addr, a); - d->resolve(); CHECK(r == WAIT); REQUIRE(0x0 == a); } r = d->read_word(MEM, addr++, a); - d->resolve(); CHECK(r == OK); REQUIRE(w++ == a); |