From b91eb002d4e6b2dc0c51b03df57c5089659ac669 Mon Sep 17 00:00:00 2001 From: bd Date: Sat, 12 Apr 2025 01:36:59 -0400 Subject: Add C11 test class header as base cache fixture class --- CMakeLists.txt | 2 +- inc/definitions.h | 4 +- tests/c11.h | 47 +++++++++++++++ tests/cache.cc | 167 ----------------------------------------------------- tests/cache_1_1.cc | 111 +++++++++++++++++++++++++++++++++++ tests/dram.cc | 38 ++++++------ 6 files changed, 181 insertions(+), 188 deletions(-) create mode 100644 tests/c11.h delete mode 100644 tests/cache.cc create mode 100644 tests/cache_1_1.cc diff --git a/CMakeLists.txt b/CMakeLists.txt index 661e45c..558f214 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -27,7 +27,7 @@ if(RAM_TESTS) # test executable add_executable(tests ${SRCS} ${TESTS}) - target_include_directories(tests PUBLIC ${PROJECT_SOURCE_DIR}/inc) + target_include_directories(tests PRIVATE ${PROJECT_SOURCE_DIR}/inc ${PROJECT_SOURCE_DIR}/inc) target_link_libraries(tests PRIVATE Catch2::Catch2WithMain PRIVATE) # test discovery diff --git a/inc/definitions.h b/inc/definitions.h index 94414a4..113c6e4 100644 --- a/inc/definitions.h +++ b/inc/definitions.h @@ -73,14 +73,14 @@ #define GET_FIELDS(a, t, i, o) \ *(t) = GET_MID_BITS(a, L1_CACHE_LINE_SPEC + LINE_SPEC, MEM_WORD_SPEC); \ *(i) = GET_MID_BITS(a, LINE_SPEC, L1_CACHE_LINE_SPEC + LINE_SPEC); \ - *(o) = GET_LS_BITS(a, LINE_SPEC); \ + *(o) = GET_LS_BITS(a, LINE_SPEC) /** * Ensures address is within the current memory size using a clean wrap. * @param an address */ #define WRAP_ADDRESS(a) \ - ((a < 0) ? ((a % MEM_WORDS) + MEM_WORDS) % MEM_WORDS : a % MEM_WORDS) \ + ((a < 0) ? ((a % MEM_WORDS) + MEM_WORDS) % MEM_WORDS : a % MEM_WORDS) // clang-format on #endif /* DEFINITIONS_H_INCLUDED */ diff --git a/tests/c11.h b/tests/c11.h new file mode 100644 index 0000000..eb59cc0 --- /dev/null +++ b/tests/c11.h @@ -0,0 +1,47 @@ +#include "cache.h" +#include "dram.h" +#include "storage.h" +#include +#include +#include +#include + +class C11 +{ + public: + C11() : m_delay(4), c_delay(2), mem(new int), fetch(new int) + { + this->c = new Cache(new Dram(this->m_delay), this->c_delay); + this->expected = {0, 0, 0, 0}; + this->actual = this->c->view(0, 1)[0]; + } + + ~C11() + { + delete this->c; + delete this->mem; + delete this->fetch; + } + + void + wait_then_do(int delay, std::function f) + { + for (int i = 0; i < delay; ++i) { + int r = f(); + + // check response + CHECK(!r); + // check for early modifications + actual = c->view(0, 1)[0]; + REQUIRE(this->expected == this->actual); + } + } + + int m_delay; + int c_delay; + Cache *c; + int *mem; + int *fetch; + std::array expected; + std::array actual; +}; diff --git a/tests/cache.cc b/tests/cache.cc deleted file mode 100644 index 313f93f..0000000 --- a/tests/cache.cc +++ /dev/null @@ -1,167 +0,0 @@ -#include "cache.h" -#include "dram.h" -#include - -class CacheFixture -{ - public: - CacheFixture() - { - this->m_delay = 4; - this->c_delay = 2; - this->d = new Dram(this->m_delay); - this->c = new Cache(this->d, this->c_delay); - this->mem = new int; - this->fetch = new int; - this->expected = {0, 0, 0, 0}; - this->actual = this->c->view(0, 1)[0]; - } - - ~CacheFixture() - { - delete this->c; - delete this->mem; - delete this->fetch; - } - - /** - * An operation that is done a lot. - */ - void - wait_for_storage(int delay, int expected, std::function f) - { - for (int i = 0; i < delay; ++i) { - int r = f(); - - // check response - CHECK(r == expected); - // check for early modifications - actual = c->view(0, 1)[0]; - REQUIRE(this->expected == this->actual); - } - } - - int m_delay; - int c_delay; - Cache *c; - Dram *d; - int *mem; - int *fetch; - std::array expected; - std::array actual; -}; - -TEST_CASE_METHOD(CacheFixture, "store 0th element in DELAY cycles", "[dram]") -{ - int r; - signed int w; - CHECK(expected == actual); - - w = 0x11223344; - // delay + 1 due to internal logic, when mem - // finishes handle_miss still returns 'blocked' - this->wait_for_storage(this->m_delay + this->c_delay + 1, 0, [this, w]() { - return this->c->write_word(this->mem, w, 0b0); - }); - - r = c->write_word(this->mem, w, 0b0); - CHECK(r); - - actual = this->d->view(0, 1)[0]; - // we do NOT write back now! - REQUIRE(expected == actual); - - expected.at(0) = w; - actual = c->view(0, 1)[0]; - REQUIRE(expected == actual); -} - -TEST_CASE_METHOD(CacheFixture, "store 0th, 1st element in DELAY cycles, with conflict", "[cache]") -{ - signed int w; - int r, i; - CHECK(expected == actual); - - w = 0x11223344; - // delay + 1 due to internal logic, when mem - // finishes handle_miss still returns 'blocked' - for (i = 0; i < this->m_delay + this->c_delay + 1; ++i) { - r = c->write_word(this->mem, w, 0b0); - CHECK(!r); - r = c->write_word(this->fetch, w, 0b1); - CHECK(!r); - - // check for early modifications - actual = c->view(0, 1)[0]; - REQUIRE(this->expected == this->actual); - } - - r = c->write_word(this->mem, w, 0b0); - CHECK(r); - - actual = d->view(0, 1)[0]; - // we do NOT write back now! - REQUIRE(expected == actual); - - expected.at(0) = w; - actual = c->view(0, 1)[0]; - REQUIRE(expected == actual); - - // this should have been loaded already! - this->wait_for_storage( - this->c_delay, 0, [this, w]() { return this->c->write_word(this->fetch, w, 0b1); }); - - r = c->write_word(this->fetch, w, 0b1); - CHECK(r); - - expected.at(1) = w; - actual = c->view(0, 1)[0]; - REQUIRE(expected == actual); -} - -TEST_CASE_METHOD( - CacheFixture, "store 0th, 1st element different tags, in DELAY cycles, no conflict", "[cache]") -{ - int r; - signed int w; - CHECK(expected == actual); - - w = 0x11223344; - // delay + 1 due to internal logic, when mem - // finishes handle_miss still returns 'blocked' - this->wait_for_storage(this->m_delay + this->c_delay + 1, 0, [this, w]() { - return this->c->write_word(this->mem, w, 0b0); - }); - - r = c->write_word(this->mem, w, 0b0); - CHECK(r); - - expected.at(0) = w; - actual = c->view(0, 1)[0]; - REQUIRE(expected == actual); - - // write back to memory - // fetch new address (don't run the completion cycle yet) - this->wait_for_storage(this->m_delay + this->m_delay + 1, 0, [this, w]() { - return this->c->write_word(this->fetch, w, 0b10000001); - }); - - // after the fetch, this cache line should be empty - this->c->write_word(this->fetch, w, 0b10000001); - CHECK(r); - - expected.at(0) = 0; - actual = c->view(0, 1)[0]; - CHECK(expected == actual); - - this->wait_for_storage( - this->c_delay, 0, [this, w]() { return this->c->write_word(this->fetch, w, 0b10000001); }); - - r = c->write_word(this->fetch, w, 0b10000001); - CHECK(r); - - expected.at(0) = 0; - expected.at(1) = w; - actual = c->view(0, 1)[0]; - REQUIRE(expected == actual); -} diff --git a/tests/cache_1_1.cc b/tests/cache_1_1.cc new file mode 100644 index 0000000..e3677a4 --- /dev/null +++ b/tests/cache_1_1.cc @@ -0,0 +1,111 @@ +#include "c11.h" +#include "cache.h" +#include "dram.h" +#include + +TEST_CASE_METHOD(C11, "store 0th element in DELAY cycles", "[dram]") +{ + int r; + signed int w; + CHECK(expected == actual); + + w = 0x11223344; + // delay + 1 due to internal logic, when mem + // finishes handle_miss still returns 'blocked' + this->wait_then_do(this->m_delay + this->c_delay + 1, [this, w]() { + return this->c->write_word(this->mem, w, 0b0); + }); + + r = c->write_word(this->mem, w, 0b0); + CHECK(r); + + expected.at(0) = w; + actual = c->view(0, 1)[0]; + REQUIRE(expected == actual); +} + +TEST_CASE_METHOD(C11, "store 0th, 1st element in DELAY cycles, with conflict", "[cache]") +{ + signed int w; + int r, i; + CHECK(expected == actual); + + w = 0x11223344; + // delay + 1 due to internal logic, when mem + // finishes handle_miss still returns 'blocked' + for (i = 0; i < this->m_delay + this->c_delay + 1; ++i) { + r = c->write_word(this->mem, w, 0b0); + CHECK(!r); + r = c->write_word(this->fetch, w, 0b1); + CHECK(!r); + + // check for early modifications + actual = c->view(0, 1)[0]; + REQUIRE(this->expected == this->actual); + } + + r = c->write_word(this->mem, w, 0b0); + CHECK(r); + + expected.at(0) = w; + actual = c->view(0, 1)[0]; + REQUIRE(expected == actual); + + // this should have been loaded already! + this->wait_then_do( + this->c_delay, [this, w]() { return this->c->write_word(this->fetch, w, 0b1); }); + + r = c->write_word(this->fetch, w, 0b1); + CHECK(r); + + expected.at(1) = w; + actual = c->view(0, 1)[0]; + REQUIRE(expected == actual); +} + +TEST_CASE_METHOD( + C11, "store 0th, 1st element different tags, in DELAY cycles, no conflict", "[cache]") +{ + int r; + signed int w; + CHECK(expected == actual); + + w = 0x11223344; + // delay + 1 due to internal logic, when mem + // finishes handle_miss still returns 'blocked' + this->wait_then_do(this->m_delay + this->c_delay + 1, [this, w]() { + return this->c->write_word(this->mem, w, 0b0); + }); + + r = c->write_word(this->mem, w, 0b0); + CHECK(r); + + expected.at(0) = w; + actual = c->view(0, 1)[0]; + REQUIRE(expected == actual); + + // write back to memory + // fetch new address (don't run the completion cycle yet) + this->wait_then_do(this->m_delay + this->m_delay + 1, [this, w]() { + return this->c->write_word(this->fetch, w, 0b10000001); + }); + + // after the fetch, this cache line should be empty + this->c->write_word(this->fetch, w, 0b10000001); + CHECK(r); + + expected.at(0) = 0; + actual = c->view(0, 1)[0]; + CHECK(expected == actual); + + this->wait_then_do( + this->c_delay, [this, w]() { return this->c->write_word(this->fetch, w, 0b10000001); }); + + r = c->write_word(this->fetch, w, 0b10000001); + CHECK(r); + + expected.at(0) = 0; + expected.at(1) = w; + actual = c->view(0, 1)[0]; + REQUIRE(expected == actual); +} diff --git a/tests/dram.cc b/tests/dram.cc index 086ca4a..06a7720 100644 --- a/tests/dram.cc +++ b/tests/dram.cc @@ -2,10 +2,10 @@ #include #include -class DramFixture +class D { public: - DramFixture() + D() { this->delay = 3; this->d = new Dram(this->delay); @@ -15,7 +15,7 @@ class DramFixture this->actual = this->d->view(0, 1)[0]; } - ~DramFixture() + ~D() { delete this->d; delete this->mem; @@ -44,14 +44,15 @@ class DramFixture std::array actual; }; -TEST_CASE_METHOD(DramFixture, "store 0th element in DELAY cycles", "[dram]") +TEST_CASE_METHOD(D, "store 0th element in DELAY cycles", "[dram]") { int r; signed int w; CHECK(expected == actual); w = 0x11223344; - this->wait_for_storage(this->delay, [this, w]() { return this->d->write_word(this->mem, w, 0x0); }); + this->wait_for_storage( + this->delay, [this, w]() { return this->d->write_word(this->mem, w, 0x0); }); r = this->d->write_word(this->mem, w, 0x0); @@ -61,14 +62,15 @@ TEST_CASE_METHOD(DramFixture, "store 0th element in DELAY cycles", "[dram]") REQUIRE(expected == actual); } -TEST_CASE_METHOD(DramFixture, "store 0th, 1st element in DELAY cycles, no conflict", "[dram]") +TEST_CASE_METHOD(D, "store 0th, 1st element in DELAY cycles, no conflict", "[dram]") { int r; signed int w; CHECK(expected == actual); w = 0x11223344; - this->wait_for_storage(this->delay, [this, w]() { return this->d->write_word(this->mem, w, 0x0); }); + this->wait_for_storage( + this->delay, [this, w]() { return this->d->write_word(this->mem, w, 0x0); }); r = d->write_word(this->mem, w, 0x0); REQUIRE(r); @@ -77,7 +79,8 @@ TEST_CASE_METHOD(DramFixture, "store 0th, 1st element in DELAY cycles, no confli actual = d->view(0, 1)[0]; REQUIRE(expected == actual); - this->wait_for_storage(this->delay, [this, w]() { return this->d->write_word(this->fetch, w, 0x1); }); + this->wait_for_storage( + this->delay, [this, w]() { return this->d->write_word(this->fetch, w, 0x1); }); r = d->write_word(this->fetch, w, 0x1); CHECK(r); @@ -87,7 +90,7 @@ TEST_CASE_METHOD(DramFixture, "store 0th, 1st element in DELAY cycles, no confli REQUIRE(expected == actual); } -TEST_CASE_METHOD(DramFixture, "store 0th element in DELAY cycles with conflict", "[dram]") +TEST_CASE_METHOD(D, "store 0th element in DELAY cycles with conflict", "[dram]") { int r, i; signed int w; @@ -112,7 +115,8 @@ TEST_CASE_METHOD(DramFixture, "store 0th element in DELAY cycles with conflict", actual = d->view(0, 1)[0]; REQUIRE(expected == actual); - this->wait_for_storage(this->delay, [this, w]() { return this->d->write_word(this->fetch, w, 0x1); }); + this->wait_for_storage( + this->delay, [this, w]() { return this->d->write_word(this->fetch, w, 0x1); }); r = d->write_word(this->fetch, w, 0x1); CHECK(r); @@ -122,7 +126,7 @@ TEST_CASE_METHOD(DramFixture, "store 0th element in DELAY cycles with conflict", REQUIRE(expected == actual); } -TEST_CASE_METHOD(DramFixture, "store line in DELAY cycles", "[dram]") +TEST_CASE_METHOD(D, "store line in DELAY cycles", "[dram]") { int r; signed int w; @@ -142,7 +146,7 @@ TEST_CASE_METHOD(DramFixture, "store line in DELAY cycles", "[dram]") REQUIRE(expected == actual); } -TEST_CASE_METHOD(DramFixture, "store line in DELAY cycles no conflict", "[dram]") +TEST_CASE_METHOD(D, "store line in DELAY cycles no conflict", "[dram]") { int r; signed int w; @@ -173,7 +177,7 @@ TEST_CASE_METHOD(DramFixture, "store line in DELAY cycles no conflict", "[dram]" REQUIRE(expected == actual); } -TEST_CASE_METHOD(DramFixture, "store line in DELAY cycles with conflict", "[dram]") +TEST_CASE_METHOD(D, "store line in DELAY cycles with conflict", "[dram]") { int r, i; signed int w; @@ -212,8 +216,7 @@ TEST_CASE_METHOD(DramFixture, "store line in DELAY cycles with conflict", "[dram REQUIRE(expected == actual); } -TEST_CASE_METHOD( - DramFixture, "store line in DELAY cycles, read in DELAY cycles, no conflict", "[dram]") +TEST_CASE_METHOD(D, "store line in DELAY cycles, read in DELAY cycles, no conflict", "[dram]") { int r, i, addr; signed int w; @@ -242,8 +245,7 @@ TEST_CASE_METHOD( REQUIRE(expected == actual); } -TEST_CASE_METHOD( - DramFixture, "store line in DELAY cycles, read in DELAY cycles with conflict", "[dram]") +TEST_CASE_METHOD(D, "store line in DELAY cycles, read in DELAY cycles with conflict", "[dram]") { int r, i, addr; signed int w; @@ -276,7 +278,7 @@ TEST_CASE_METHOD( } TEST_CASE_METHOD( - DramFixture, + D, "store line in DELAY cycles, read one element at a time in DELAY cycles " "with conflict", "[dram]") -- cgit v1.2.3