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-rw-r--r--src/storage/cache.cc15
-rw-r--r--src/storage/dram.cc3
2 files changed, 12 insertions, 6 deletions
diff --git a/src/storage/cache.cc b/src/storage/cache.cc
index 52f13b9..2031367 100644
--- a/src/storage/cache.cc
+++ b/src/storage/cache.cc
@@ -34,6 +34,7 @@ Response Cache::write(Accessor accessor, signed int data, int address)
int tag, index, offset;
get_bit_fields(address, &tag, &index, &offset);
this->data->at(index).at(offset) = data;
+ this->meta[index].at(1) = 1;
r = OK;
}
}
@@ -52,22 +53,24 @@ void Cache::fetch_resource(int expected)
Response r = OK;
int tag, index, offset;
std::array<signed int, LINE_SIZE> actual;
- std::array<int, 2> meta;
+ std::array<int, 2> *meta;
get_bit_fields(expected, &tag, &index, &offset);
- meta = this->meta.at(index);
+ meta = &this->meta.at(index);
- if (this->meta[index][0] != tag) {
+ if (meta->at(0) != tag) {
// address not in cache
- if (this->meta[index][1] >= 0) {
+ if (meta->at(1) >= 0) {
// occupant is dirty
// TODO
r = WAIT;
} else {
actual = this->data->at(index);
r = this->lower->read(L1CACHE, expected, actual);
- // clear dirty bit and set tag?
-
+ if (r == OK) {
+ meta->at(0) = tag;
+ meta->at(1) = -1;
+ }
}
}
diff --git a/src/storage/dram.cc b/src/storage/dram.cc
index 9dab4ed..441f10b 100644
--- a/src/storage/dram.cc
+++ b/src/storage/dram.cc
@@ -57,13 +57,16 @@ Response Dram::read(
Accessor accessor, int address, std::array<signed int, LINE_SIZE> &data)
{
Response r = WAIT;
+
if (this->requester == IDLE)
this->requester = accessor;
+
if (this->requester == accessor) {
if (this->wait_time == 0) {
this->do_read(data, address);
r = OK;
}
}
+
return r;
}