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AgeCommit message (Collapse)Author
2025-03-23Initial GUI CommitSiddarth-Suresh
2025-03-21add 'process' function to handle boilerplate on every requestbd
2025-03-21Small cleanups to up a lot of inplementation detailsbd
2025-03-21Rewrite current cache.cc tests, add test-helper function to drambd
2025-03-11Merge remote-tracking branch 'origin/master' into bdunahubd
2025-03-11Rename read/write to read_line and write_wordbd
2025-03-11remove operation.h and branch determined by read/write in cache loadbd
2025-03-11read has to wait until cache has the right line from memory after eviction, ↵Siddarth-Suresh
write only has to wait until eviction and does not care about line replacement in cache from memory
2025-03-11Clarify size of mem and cache in definitions, CLI print invalid tagsbd
2025-03-11Resolving conflictsSiddarth-Suresh
2025-03-11support for reading word, writing line to storage, dirty cache eviction, ↵Siddarth-Suresh
cache load
2025-03-11Write line, dirty cache eviction, cache load word/line (for future ↵Siddarth-Suresh
multilevel cache implementation)
2025-03-10overload << operator for drambd
2025-03-10Add starter overloaded << operator for cachebd
2025-03-10Update cli method signatures, add some getters to cache and storagebd
2025-03-09cache store single testbd
2025-03-09Untested implementation for loading absent data into cachebd
2025-03-09Move do_write to dram.h, is_blocked flagbd
2025-03-09finish merge conflictbd
2025-03-09Merge remote-tracking branch 'origin/master' into bdunahubd
2025-03-09Add bitset field to cache.h for keeping track of write/validitybd
2025-03-09Implement dram loadSiddarth-Suresh
2025-03-08Refactor function return schemebd
2025-03-06dram write (no delay, no accessor trackingbd
2025-03-06Storage.view method, some initial testsbd
2025-03-05whitespacebd
2025-03-05constructors + method declarations for cache, dram, reponse, storagebd