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2025-04-27Fix push/pop instructionbd
2025-04-27Bug fixesSiddarth-Suresh
2025-04-27Basic register displaybd
2025-04-27Merge remote-tracking branch 'origin/master' into vector_extbd
2025-04-27WB and MEM changes for vectorsSiddarth-Suresh
2025-04-26Fix for load and store vectorSiddarth-Suresh
2025-04-26Initial vector extension changesSiddarth-Suresh
2025-04-25Pass full DTO to GUIbd
2025-04-24Template files for vectors to override arithmetic operationsSiddarth-Suresh
2025-04-23Rename Response.WAIT to READY, delete BLOCKEDbd
2025-04-23Move dum class to tests folderbd
2025-04-22Cleanup some importsbd
2025-04-22Remove 'type' field out of InstrDTObd
2025-04-22Use a struct for InstrDTObd
2025-04-22Add definition for size of vector registerbd
2025-04-22Remove the accessor objectbd
2025-04-22Fix bug where checking for multiplication overflow resulted in FPEbd
2025-04-22Properly set condition codes for all operations sub SHIFTsbd
2025-04-21add RET instructionbd
2025-04-21Merge remote-tracking branch 'origin/master' into gui-nextbd
2025-04-21Add licensing informationbd
2025-04-19GUI validate programbd
2025-04-18Keep track of squashed instructions in DTO objectbd
2025-04-17Add option to turn off pipelinebd
2025-04-17HALT instruction... but it voids future stages' instructionsbd
2025-04-17The pipeline says some things and there are numbersbd
2025-04-17Swap the source and destination registers for LOAD, final fixbd
2025-04-17Keep track of checked out in DTO to simplify wb cond logic (bug)bd
2025-04-16Fix a bug related to parsing immediates in decodebd
2025-04-15Added pipeline to GUISiddarth-Suresh
2025-04-12Add pipe_spec.hbd
2025-04-12Delete some more storage-only filesbd
2025-04-11Move storage to a separate git repository.bd
2025-04-01Merge remote-tracking branch 'origin/master' into bdunahubd
2025-04-01Finish adding initial tests for full pipelinebd
2025-04-01GUI and controller on separate threadsSiddarth-Suresh
2025-04-01Lots of fixes and testsbd
2025-04-01Fix a lot of pipeline bugsbd
2025-04-01Ensure all stages only do work if they are not 'OK'bd
2025-03-31MEM WB stageSiddarth-Suresh
2025-03-30Ensure type-I instruction could use S3 as displacementbd
2025-03-30Implementation and tests for J typesbd
2025-03-30Add tests for EXbd
2025-03-30Add mock stage, proper decode testsbd
2025-03-30untested ALU type R operationsbd
2025-03-30Setting condition code register, overflow guardbd
2025-03-30Minor simplification to API between pipeline componentsbd
2025-03-29Quick fix to fix compile-errorbd
2025-03-29Add advance logic for decodebd
2025-03-29Add proper read and write guard methods, clean up id test filebd
generated by cgit v1.2.3 (git 2.39.1) at 2025-05-13 09:38:46 +0000