| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 31 hours | Add ROTV instruction | bd | |
| 40 hours | Add I_VECT field type for SRDL, SRDS, with two vector reg 1 general | bd | |
| 41 hours | Remove I_VECT field types | bd | |
| 41 hours | Replaced STOREV with LOADV | bd | |
| 2 days | Add type field to InstrDTO, required for next refactor | bd | |
| 4 days | Move is_logical_type and is_vector_type to instr.h | bd | |
| 2025-04-22 | Remove subfolders | bd | |
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index : RISC-VECTOR.git | |
| A simulator for the custom RISC-V[ECTOR] ISA written in C++ | bd |
| summaryrefslogtreecommitdiff |