From 79a68cabb033530871a1dab259149480584b2586 Mon Sep 17 00:00:00 2001 From: bd Date: Sun, 11 May 2025 13:08:16 -0400 Subject: Add I_VECT field type for SRDL, SRDS, with two vector reg 1 general --- src/ex.cc | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'src/ex.cc') diff --git a/src/ex.cc b/src/ex.cc index 3328cbe..cd00254 100644 --- a/src/ex.cc +++ b/src/ex.cc @@ -240,7 +240,7 @@ void EX::handle_vector_operations( this->set_condition(UF, underflow); } -void EX::handle_i_vector_operations(signed int &s1, signed int s2, Mnemonic m) +void EX::handle_s_vector_operations(signed int &s1, signed int s2, Mnemonic m) { switch (m) { // case SRDL: @@ -249,7 +249,7 @@ void EX::handle_i_vector_operations(signed int &s1, signed int s2, Mnemonic m) // break; default: - throw std::invalid_argument("handle_i_vector_operations did not " + throw std::invalid_argument("handle_s_vector_operations did not " "receive a SRDL or SRDS operation!"); } } @@ -270,11 +270,11 @@ void EX::advance_helper() handle_vector_operations( this->curr_instr->operands.vector.slot_one, this->curr_instr->operands.vector.slot_two, m, v_len_or_pc); - } else { - handle_i_vector_operations( - this->curr_instr->operands.i_vector.slot_one, - this->curr_instr->operands.i_vector.slot_two, m); - } + }// else { + // handle_s_vector_operations( + // this->curr_instr->operands.s_vector.slot_one, + // this->curr_instr->operands.s_vector.slot_two, m); + // } this->status = OK; } -- cgit v1.2.3