From 68324683cde10c636a4a602644f3e64d24b0e412 Mon Sep 17 00:00:00 2001
From: bd <bdunahu@operationnull.com>
Date: Tue, 1 Apr 2025 20:36:31 -0400
Subject: Lots of fixes and tests

---
 src/sim/controller.cc |  1 +
 src/sim/ex.cc         | 53 +++++++++++++++++++++++++++++++++++++++++++--------
 src/sim/id.cc         | 21 ++++++++++++++++----
 src/sim/if.cc         |  1 +
 src/sim/instrDTO.cc   |  4 ++++
 src/sim/mm.cc         |  1 -
 src/sim/stage.cc      |  7 +++++--
 src/sim/wb.cc         |  1 +
 8 files changed, 74 insertions(+), 15 deletions(-)

(limited to 'src/sim')

diff --git a/src/sim/controller.cc b/src/sim/controller.cc
index 293ee73..0b5c4d0 100644
--- a/src/sim/controller.cc
+++ b/src/sim/controller.cc
@@ -34,6 +34,7 @@ InstrDTO *Controller::advance(Response p)
 	InstrDTO *r;
 	r = this->next->advance(p);
 	++this->clock_cycle;
+	
 	return r;
 }
 
diff --git a/src/sim/ex.cc b/src/sim/ex.cc
index ec4c47f..98a2d19 100644
--- a/src/sim/ex.cc
+++ b/src/sim/ex.cc
@@ -9,7 +9,7 @@
 
 // clang-format off
 #define INIT_INSTRUCTION(mnemonic, body)					\
-	{mnemonic, [this](signed int &s1, signed int s2, signed int s3) { \
+	{mnemonic, [this](signed int &s1, signed int s2, signed int s3, unsigned int pc) {	\
 		body; \
 	}}
 // clang-format on
@@ -24,6 +24,7 @@ EX::EX(Stage *stage) : Stage(stage)
 			ADD,
 			{
 				s1 = s1 + s2;
+				(void)pc;
 				(void)s3;
 				(void)this;
 			}),
@@ -32,6 +33,7 @@ EX::EX(Stage *stage) : Stage(stage)
 			SUB,
 			{
 				s1 = s1 - s2;
+				(void)pc;
 				(void)s3;
 				(void)this;
 			}),
@@ -40,6 +42,7 @@ EX::EX(Stage *stage) : Stage(stage)
 			MUL,
 			{
 				s1 = s1 * s2;
+				(void)pc;
 				(void)s3;
 				(void)this;
 			}),
@@ -48,6 +51,7 @@ EX::EX(Stage *stage) : Stage(stage)
 			QUOT,
 			{
 				s1 = s1 / s2;
+				(void)pc;
 				(void)s3;
 				(void)this;
 			}),
@@ -56,6 +60,7 @@ EX::EX(Stage *stage) : Stage(stage)
 			REM,
 			{
 				s1 = s1 % s2;
+				(void)pc;
 				(void)s3;
 				(void)this;
 			}),
@@ -64,6 +69,7 @@ EX::EX(Stage *stage) : Stage(stage)
 			SFTR,
 			{
 				s1 = s1 >> s2;
+				(void)pc;
 				(void)s3;
 				(void)this;
 			}),
@@ -72,6 +78,7 @@ EX::EX(Stage *stage) : Stage(stage)
 			SFTL,
 			{
 				s1 = s1 << s2;
+				(void)pc;
 				(void)s3;
 				(void)this;
 			}),
@@ -80,6 +87,7 @@ EX::EX(Stage *stage) : Stage(stage)
 			AND,
 			{
 				s1 = s1 & s2;
+				(void)pc;
 				(void)s3;
 				(void)this;
 			}),
@@ -88,6 +96,7 @@ EX::EX(Stage *stage) : Stage(stage)
 			OR,
 			{
 				s1 = s1 | s2;
+				(void)pc;
 				(void)s3;
 				(void)this;
 			}),
@@ -96,6 +105,7 @@ EX::EX(Stage *stage) : Stage(stage)
 			NOT,
 			{
 				s1 = ~s1;
+				(void)pc;
 				(void)s3;
 				(void)s2;
 				(void)this;
@@ -105,6 +115,7 @@ EX::EX(Stage *stage) : Stage(stage)
 			XOR,
 			{
 				s1 = s1 ^ s2;
+				(void)pc;
 				(void)s3;
 				(void)this;
 			}),
@@ -112,6 +123,7 @@ EX::EX(Stage *stage) : Stage(stage)
 		INIT_INSTRUCTION(
 			ADDV,
 			{
+				(void)pc;
 				(void)s3;
 				(void)s2;
 				(void)s1;
@@ -121,6 +133,7 @@ EX::EX(Stage *stage) : Stage(stage)
 		INIT_INSTRUCTION(
 			SUBV,
 			{
+				(void)pc;
 				(void)s3;
 				(void)s2;
 				(void)s1;
@@ -130,6 +143,7 @@ EX::EX(Stage *stage) : Stage(stage)
 		INIT_INSTRUCTION(
 			MULV,
 			{
+				(void)pc;
 				(void)s3;
 				(void)s2;
 				(void)s1;
@@ -139,6 +153,7 @@ EX::EX(Stage *stage) : Stage(stage)
 		INIT_INSTRUCTION(
 			DIVV,
 			{
+				(void)pc;
 				(void)s3;
 				(void)s2;
 				(void)s1;
@@ -148,16 +163,19 @@ EX::EX(Stage *stage) : Stage(stage)
 		INIT_INSTRUCTION(
 			CMP,
 			{
+				cout << "CMP: " << s1 << ":" << s2 << std::endl;
 				(s1 > s2) ? this->set_condition(GT, true)
 						  : this->set_condition(GT, false);
 				(s1 == s2) ? this->set_condition(EQ, true)
 						   : this->set_condition(EQ, false);
+				(void)pc;
 				(void)s3;
 			}),
 
 		INIT_INSTRUCTION(
 			CEV,
 			{
+				(void)pc;
 				(void)s3;
 				(void)s2;
 				(void)s1;
@@ -169,6 +187,7 @@ EX::EX(Stage *stage) : Stage(stage)
 			LOAD,
 			{
 				s1 = s1 + s3;
+				(void)pc;
 				(void)s2;
 				(void)this;
 			}),
@@ -176,6 +195,7 @@ EX::EX(Stage *stage) : Stage(stage)
 		INIT_INSTRUCTION(
 			LOADV,
 			{
+				(void)pc;
 				(void)s3;
 				(void)s2;
 				(void)s1;
@@ -185,8 +205,10 @@ EX::EX(Stage *stage) : Stage(stage)
 		INIT_INSTRUCTION(
 			ADDI,
 			{
+				std::cout << this->id << ": " << s1 << "," << s2 << "," << s3
+						  << std::endl;
 				s1 = s1 + s3;
-				std::cout << "= " << s2 << std::endl;
+				(void)pc;
 				(void)s2;
 				(void)this;
 			}),
@@ -195,6 +217,7 @@ EX::EX(Stage *stage) : Stage(stage)
 			SUBI,
 			{
 				s1 = s1 - s3;
+				(void)pc;
 				(void)s2;
 				(void)this;
 			}),
@@ -203,6 +226,7 @@ EX::EX(Stage *stage) : Stage(stage)
 			SFTRI,
 			{
 				s1 = s1 >> s3;
+				(void)pc;
 				(void)s2;
 				(void)this;
 			}),
@@ -211,6 +235,7 @@ EX::EX(Stage *stage) : Stage(stage)
 			SFTLI,
 			{
 				s1 = s1 << s3;
+				(void)pc;
 				(void)s2;
 				(void)this;
 			}),
@@ -219,6 +244,7 @@ EX::EX(Stage *stage) : Stage(stage)
 			ANDI,
 			{
 				s1 = s1 & s3;
+				(void)pc;
 				(void)s2;
 				(void)this;
 			}),
@@ -227,6 +253,7 @@ EX::EX(Stage *stage) : Stage(stage)
 			ORI,
 			{
 				s1 = s1 | s3;
+				(void)pc;
 				(void)s2;
 				(void)this;
 			}),
@@ -235,6 +262,7 @@ EX::EX(Stage *stage) : Stage(stage)
 			XORI,
 			{
 				s1 = s1 ^ s3;
+				(void)pc;
 				(void)s2;
 				(void)this;
 			}),
@@ -243,6 +271,7 @@ EX::EX(Stage *stage) : Stage(stage)
 			STORE,
 			{
 				s1 = s1 + s3;
+				(void)pc;
 				(void)s2;
 				(void)this;
 			}),
@@ -250,6 +279,7 @@ EX::EX(Stage *stage) : Stage(stage)
 		INIT_INSTRUCTION(
 			STOREV,
 			{
+				(void)pc;
 				(void)s3;
 				(void)s2;
 				(void)s1;
@@ -261,6 +291,7 @@ EX::EX(Stage *stage) : Stage(stage)
 			JMP,
 			{
 				s1 = s1 + s2;
+				(void)pc;
 				(void)s3;
 				(void)this;
 			}),
@@ -268,7 +299,7 @@ EX::EX(Stage *stage) : Stage(stage)
 		INIT_INSTRUCTION(
 			JRL,
 			{
-				s1 = this->pc + s2;
+				s1 = pc + s2;
 				(void)s3;
 				(void)this;
 			}),
@@ -277,6 +308,7 @@ EX::EX(Stage *stage) : Stage(stage)
 			JAL,
 			{
 				s1 = s1 + s2;
+				(void)pc;
 				(void)s3;
 				(void)this;
 			}),
@@ -284,7 +316,7 @@ EX::EX(Stage *stage) : Stage(stage)
 		INIT_INSTRUCTION(
 			BEQ,
 			{
-				(this->get_condition(EQ)) ? s1 = wrap_address(this->pc + s2)
+				(this->get_condition(EQ)) ? s1 = wrap_address(pc + s2)
 										  : s1 = -1;
 				(void)s3;
 			}),
@@ -292,7 +324,7 @@ EX::EX(Stage *stage) : Stage(stage)
 		INIT_INSTRUCTION(
 			BGT,
 			{
-				(this->get_condition(GT)) ? s1 = wrap_address(this->pc + s2)
+				(this->get_condition(GT)) ? s1 = wrap_address(pc + s2)
 										  : s1 = -1;
 				(void)s3;
 			}),
@@ -300,7 +332,7 @@ EX::EX(Stage *stage) : Stage(stage)
 		INIT_INSTRUCTION(
 			BUF,
 			{
-				(this->get_condition(UF)) ? s1 = wrap_address(this->pc) + s2
+				(this->get_condition(UF)) ? s1 = wrap_address(pc + s2)
 										  : s1 = -1;
 				(void)s3;
 			}),
@@ -308,7 +340,7 @@ EX::EX(Stage *stage) : Stage(stage)
 		INIT_INSTRUCTION(
 			BOF,
 			{
-				(this->get_condition(OF)) ? s1 = wrap_address(this->pc + s2)
+				(this->get_condition(OF)) ? s1 = wrap_address(pc + s2)
 										  : s1 = -1;
 				(void)s3;
 			}),
@@ -316,6 +348,7 @@ EX::EX(Stage *stage) : Stage(stage)
 		INIT_INSTRUCTION(
 			PUSH,
 			{
+				(void)pc;
 				(void)s3;
 				(void)s2;
 				(void)s1;
@@ -325,6 +358,7 @@ EX::EX(Stage *stage) : Stage(stage)
 		INIT_INSTRUCTION(
 			POP,
 			{
+				(void)pc;
 				(void)s3;
 				(void)s2;
 				(void)s1;
@@ -335,6 +369,7 @@ EX::EX(Stage *stage) : Stage(stage)
 		INIT_INSTRUCTION(
 			NOP,
 			{
+				(void)pc;
 				(void)s3;
 				(void)s2;
 				(void)s1;
@@ -346,14 +381,16 @@ EX::EX(Stage *stage) : Stage(stage)
 void EX::advance_helper()
 {
 	signed int s1, s2, s3;
+	unsigned int pc;
 	Mnemonic m;
 
 	m = this->curr_instr->get_mnemonic();
 	s1 = this->curr_instr->get_s1();
 	s2 = this->curr_instr->get_s2();
 	s3 = this->curr_instr->get_s3();
+	pc = this->curr_instr->get_pc();
 
-	this->instr_map[m](s1, s2, s3);
+	this->instr_map[m](s1, s2, s3, pc );
 
 	this->curr_instr->set_s1(s1);
 	this->status = OK;
diff --git a/src/sim/id.cc b/src/sim/id.cc
index ddac35b..805a4df 100644
--- a/src/sim/id.cc
+++ b/src/sim/id.cc
@@ -51,6 +51,9 @@ void ID::advance_helper()
 	if (curr_instr->get_mnemonic() == NOP)
 		this->status = OK;
 	else {
+		std::cout << this->id << ": " << this->curr_instr->get_s1() << ","
+				  << this->curr_instr->get_s2() << ","
+				  << this->curr_instr->get_s3() << std::endl;
 		s1 = curr_instr->get_instr_bits();
 		get_instr_fields(s1, s2, s3, m, t);
 		if (this->status == OK) {
@@ -60,6 +63,9 @@ void ID::advance_helper()
 			curr_instr->set_mnemonic(m);
 			curr_instr->set_type(t);
 		}
+		std::cout << this->id << ": " << this->curr_instr->get_s1() << ","
+				  << this->curr_instr->get_s2() << ","
+				  << this->curr_instr->get_s3() << std::endl;
 	}
 }
 
@@ -76,7 +82,7 @@ void ID::get_instr_fields(
 		break;
 	case 0b01:
 		t = I;
-		this->decode_I_type(s1, s2, s3);
+		this->decode_I_type(s1, s2, s3, m);
 		break;
 	case 0b10:
 		t = J;
@@ -107,9 +113,11 @@ void ID::decode_R_type(signed int &s1, signed int &s2, signed int &s3)
 	this->status = (r1 == OK && r2 == OK) ? OK : STALLED;
 }
 
-void ID::decode_I_type(signed int &s1, signed int &s2, signed int &s3)
+void ID::decode_I_type(
+	signed int &s1, signed int &s2, signed int &s3, Mnemonic &m)
 {
 	unsigned int s0b, s1b, s2b;
+	Response r1;
 
 	s0b = REG_SIZE;
 	s1b = s0b + REG_SIZE;
@@ -118,8 +126,13 @@ void ID::decode_I_type(signed int &s1, signed int &s2, signed int &s3)
 	s2 = GET_MID_BITS(s1, s0b, s1b);
 	s1 = GET_LS_BITS(s1, s0b);
 
-	this->status = this->read_guard(s1);
-	this->write_guard(s2);
+	std::cout << m << ":" << s2 << std::endl;
+	r1 = this->read_guard(s1);
+	if (m != STORE && m != STOREV) {
+		this->status = r1;
+		this->write_guard(s2);
+	} else
+		this->status = (this->read_guard(s2) == OK && r1 == OK) ? OK : STALLED;
 }
 
 void ID::decode_J_type(signed int &s1, signed int &s2)
diff --git a/src/sim/if.cc b/src/sim/if.cc
index bc40688..85fb27f 100644
--- a/src/sim/if.cc
+++ b/src/sim/if.cc
@@ -33,6 +33,7 @@ void IF::advance_helper()
 		if (r == OK) {
 			this->curr_instr = new InstrDTO();
 			this->curr_instr->set_instr_bits(bits);
+			this->curr_instr->set_pc(this->pc);
 		}
 	}
 }
diff --git a/src/sim/instrDTO.cc b/src/sim/instrDTO.cc
index 7324ba9..d36e957 100644
--- a/src/sim/instrDTO.cc
+++ b/src/sim/instrDTO.cc
@@ -25,6 +25,8 @@ Mnemonic InstrDTO::get_mnemonic() { return this->mnemonic; }
 
 Type InstrDTO::get_type() { return this->type; }
 
+unsigned int InstrDTO::get_pc() { return this->pc; }
+
 void InstrDTO::set_time_of(Accessor a, int i) { this->hist[a] = i; }
 
 void InstrDTO::set_instr_bits(signed int instr) { this->instr_bits = instr; }
@@ -38,3 +40,5 @@ void InstrDTO::set_s3(signed int s) { this->s3 = s; }
 void InstrDTO::set_mnemonic(Mnemonic m) { this->mnemonic = m; }
 
 void InstrDTO::set_type(Type t) { this->type = t; }
+
+void InstrDTO::set_pc(unsigned int pc) { this->pc = pc; }
diff --git a/src/sim/mm.cc b/src/sim/mm.cc
index e29bf90..c83ae7d 100644
--- a/src/sim/mm.cc
+++ b/src/sim/mm.cc
@@ -10,7 +10,6 @@ void MM::advance_helper()
 {
 	signed int data;
 
-	std::cout << "mem" << this->curr_instr->get_s2() << std::endl;
 	switch (this->curr_instr->get_mnemonic()) {
 	case LOAD:
 		this->status = this->storage->read_word(
diff --git a/src/sim/stage.cc b/src/sim/stage.cc
index b10a206..bd0ff6b 100644
--- a/src/sim/stage.cc
+++ b/src/sim/stage.cc
@@ -95,8 +95,11 @@ bool Stage::is_checked_out(signed int r)
 
 void Stage::squash()
 {
-	this->curr_instr->set_mnemonic(NOP);
-	this->status = OK;
+	if (curr_instr) {
+		std::cout << "!!!" << std::endl;
+		this->curr_instr->set_mnemonic(NOP);
+		this->status = OK;
+	}
 	if (this->next) {
 		this->next->squash();
 	}
diff --git a/src/sim/wb.cc b/src/sim/wb.cc
index 01768e8..50acd05 100644
--- a/src/sim/wb.cc
+++ b/src/sim/wb.cc
@@ -28,6 +28,7 @@ void WB::write_handler()
 
 	reg = this->checked_out.front();
 	this->checked_out.pop_front();
+	std::cout << "storing " << reg << " with " << this->curr_instr->get_s1() << std::endl;
 	this->store_register(reg, this->curr_instr->get_s1());
 }
 
-- 
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