From b87f192702f5a02be473c9b05b8b34f1dc7e4296 Mon Sep 17 00:00:00 2001
From: Siddarth-Suresh <65844402+Siddarth-Suresh@users.noreply.github.com>
Date: Sun, 9 Mar 2025 11:39:59 -0400
Subject: Implement dram load

---
 src/storage/cache.cc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/storage/cache.cc')

diff --git a/src/storage/cache.cc b/src/storage/cache.cc
index bbefb2a..67cedda 100644
--- a/src/storage/cache.cc
+++ b/src/storage/cache.cc
@@ -19,4 +19,4 @@ Response Cache::write(Accessor accessor, signed int data, int address)
 	return WAIT;
 }
 
-Response Cache::read(Accessor accessor, int address) { return WAIT; }
+Response Cache::read(Accessor accessor, int address, std::array<signed int, LINE_SIZE>& data) { return WAIT; }
-- 
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