From 2416cce2eec7ecdf0587896620806c465747eada Mon Sep 17 00:00:00 2001
From: bd <bdunahu@operationnull.com>
Date: Sat, 22 Mar 2025 14:19:10 -0400
Subject: Add controller.h, implementation and tests.

---
 src/sim/controller.cc | 37 +++++++++++++++++++++++++++++++++++++
 src/sim/stage.cc      |  5 +++++
 src/storage/cache.cc  |  1 -
 3 files changed, 42 insertions(+), 1 deletion(-)
 create mode 100644 src/sim/controller.cc
 create mode 100644 src/sim/stage.cc

(limited to 'src')

diff --git a/src/sim/controller.cc b/src/sim/controller.cc
new file mode 100644
index 0000000..c6d1bff
--- /dev/null
+++ b/src/sim/controller.cc
@@ -0,0 +1,37 @@
+#include "controller.h"
+#include "storage.h"
+
+Controller::Controller(Storage *storage, bool is_pipelined)
+{
+	this->storage = storage;
+	this->is_pipelined = is_pipelined;
+	this->pc = 0x0;
+	this->gprs = {0};
+
+	// setup the other pipeline stages
+	this->next = nullptr;
+}
+
+Controller::~Controller() { ; }
+
+void Controller::run_for(int number)
+{
+	int i;
+	for (i = 0; i < number; ++i) {
+		this->advance();
+	}
+}
+
+int Controller::get_clock_cycle() { return this->clock_cycle; }
+
+std::array<int, GPR_NUM> Controller::get_gprs() {
+	return this->gprs;
+}
+
+int Controller::get_pc() { return this->pc; }
+
+void Controller::advance() {
+	;
+	// this->next->advance()
+	++this->clock_cycle;
+}
diff --git a/src/sim/stage.cc b/src/sim/stage.cc
new file mode 100644
index 0000000..7d3a678
--- /dev/null
+++ b/src/sim/stage.cc
@@ -0,0 +1,5 @@
+#include "stage.h"
+
+std::array<int, GPR_NUM> Stage::gprs;
+int Stage::pc;
+Storage *Stage::storage;
diff --git a/src/storage/cache.cc b/src/storage/cache.cc
index 8acdf08..2630632 100644
--- a/src/storage/cache.cc
+++ b/src/storage/cache.cc
@@ -3,7 +3,6 @@
 #include "response.h"
 #include "utils.h"
 #include <bits/stdc++.h>
-#include <bitset>
 #include <iostream>
 #include <iterator>
 
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