From 5e1d59feaa353e7ea4179fd0c8104fc4450a7a16 Mon Sep 17 00:00:00 2001 From: bd Date: Wed, 16 Apr 2025 23:53:08 -0400 Subject: Fix instruction opcode numbering issue, use assembler's output --- src/sim/instr.cc | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) (limited to 'src') diff --git a/src/sim/instr.cc b/src/sim/instr.cc index e614de5..8bbd0b5 100644 --- a/src/sim/instr.cc +++ b/src/sim/instr.cc @@ -13,12 +13,11 @@ const std::unordered_map mnemonic_map = { {0b0110100, SUBV}, {0b0111000, MULV}, {0b0111100, DIVV}, {0b1000000, CMP}, {0b1000100, CEV}, {0b000101, LOAD}, {0b001001, LOADV}, {0b0001101, ADDI}, {0b0010001, SUBI}, - {0b0010101, SFTRI}, {0b0011101, SFTLI}, {0b0100001, ANDI}, - {0b0100101, ORI}, {0b0101001, XORI}, {0b0101101, STORE}, - {0b0110001, STOREV}, {0b0000101, CEV}, {0b0000101, LOAD}, - {0b0001001, LOADV}, {0b0001001, LOADV}, {0b0000110, JMP}, - {0b0001010, JRL}, {0b0001110, JAL}, {0b0010010, BEQ}, - {0b0010110, BGT}, {0b0011010, BUF}, {0b0011110, BOF}, - {0b0100010, PUSH}, {0b0100110, POP}, + {0b0010101, SFTRI}, {0b0011001, SFTLI}, {0b0011101, ANDI}, + {0b0100001, ORI}, {0b0100101, XORI}, {0b0101001, STORE}, + {0b0101101, STOREV}, {0b0000110, JMP}, {0b0001010, JRL}, + {0b0001110, JAL}, {0b0010010, BEQ}, {0b0010110, BGT}, + {0b0011010, BUF}, {0b0011110, BOF}, {0b0100010, PUSH}, + {0b0100110, POP}, }; } // namespace instr -- cgit v1.2.3