From ebeb29d1b87c533c1e80e86ceed9ddc40e4d2cb2 Mon Sep 17 00:00:00 2001 From: bd Date: Sun, 30 Mar 2025 19:42:34 -0400 Subject: Add tests for EX --- src/sim/ex.cc | 18 +++++++++++++++++- src/sim/id.cc | 40 +++++++++++++++++++++------------------- src/sim/stage.cc | 2 +- 3 files changed, 39 insertions(+), 21 deletions(-) (limited to 'src') diff --git a/src/sim/ex.cc b/src/sim/ex.cc index 50882d2..d177bc9 100644 --- a/src/sim/ex.cc +++ b/src/sim/ex.cc @@ -199,4 +199,20 @@ EX::EX(Stage *stage) : Stage(stage) }; } -void EX::advance_helper() {} +void EX::advance_helper() { + signed int s1, s2; + Mnemonic m; + + // it may be good to ensure we are not doing + // work that has already been done + if (this->curr_instr) { + m = this->curr_instr->get_mnemonic(); + s1 = this->curr_instr->get_s1(); + s2 = this->curr_instr->get_s2(); + + this->instr_map[m](s1, s2); + + this->curr_instr->set_s1(s1); + this->status = OK; + } +} diff --git a/src/sim/id.cc b/src/sim/id.cc index 36addbb..edf74e2 100644 --- a/src/sim/id.cc +++ b/src/sim/id.cc @@ -8,25 +8,6 @@ ID::ID(Stage *stage) : Stage(stage) { this->id = DCDE; } -void ID::get_instr_fields( - signed int &s1, signed int &s2, signed int &s3, Mnemonic &m) -{ - unsigned int type; - this->split_instr(s1, type, m); - - switch (type) { - case 0b00: - this->decode_R_type(s1, s2, s3); - break; - case 0b01: - this->decode_I_type(s1, s2, s3); - break; - case 0b10: - this->decode_J_type(s1, s2); - break; - } -} - void ID::split_instr(signed int &raw, unsigned int &type, Mnemonic &m) { unsigned int opcode, opcode_size; @@ -80,6 +61,27 @@ void ID::advance_helper() } } +void ID::get_instr_fields( + signed int &s1, signed int &s2, signed int &s3, Mnemonic &m) +{ + unsigned int type; + this->split_instr(s1, type, m); + + switch (type) { + case 0b00: + this->decode_R_type(s1, s2, s3); + break; + case 0b01: + this->decode_I_type(s1, s2, s3); + break; + case 0b10: + this->decode_J_type(s1, s2); + break; + case 0b11: + this->status = OK; + } +} + void ID::decode_R_type(signed int &s1, signed int &s2, signed int &s3) { unsigned int s0b, s1b, s2b; diff --git a/src/sim/stage.cc b/src/sim/stage.cc index 929a4b9..74a2176 100644 --- a/src/sim/stage.cc +++ b/src/sim/stage.cc @@ -45,7 +45,7 @@ InstrDTO *Stage::advance(Response p) void Stage::set_condition(CC c, bool v) { if (v) - this->gprs[3] = this->gprs[3] & 1 << c; + this->gprs[3] = this->gprs[3] | 1 << c; else this->gprs[3] = this->gprs[3] & ~(1 << c); } -- cgit v1.2.3