From f4a5db14436ddbb2820c0abefcb34e5482105a12 Mon Sep 17 00:00:00 2001
From: bd <bdunahu@operationnull.com>
Date: Thu, 8 May 2025 19:44:23 -0400
Subject: Move is_logical_type and is_vector_type to instr.h

---
 src/ex.cc    |  7 ++++---
 src/id.cc    |  2 +-
 src/instr.cc | 15 +++++++++++++++
 src/stage.cc | 14 --------------
 src/wb.cc    |  5 +++--
 5 files changed, 23 insertions(+), 20 deletions(-)

(limited to 'src')

diff --git a/src/ex.cc b/src/ex.cc
index 286c7ba..f0ca5b5 100644
--- a/src/ex.cc
+++ b/src/ex.cc
@@ -20,6 +20,7 @@
 #include "pipe_spec.h"
 #include "response.h"
 #include "stage.h"
+#include "instr.h"
 #include <unordered_map>
 
 // Switch statements for each instruction
@@ -37,7 +38,7 @@ void EX::advance_helper()
 	m = this->curr_instr->mnemonic;
 	pc = this->curr_instr->slot_B;
 
-	if (this->is_vector_type(m)) {
+	if (instr::is_vector_type(m)) {
 		if (this->curr_instr->mnemonic != LOADV &&
 			this->curr_instr->mnemonic != STOREV) {
 			v1 = this->curr_instr->operands.vector.slot_one;
@@ -60,7 +61,7 @@ void EX::advance_helper()
 		s3 = this->curr_instr->operands.integer.slot_three;
 	}
 
-	if (this->is_logical(m)) {
+	if (instr::is_logical_type(m)) {
 		this->set_condition(OF, false);
 		this->set_condition(UF, false);
 	}
@@ -235,7 +236,7 @@ void EX::advance_helper()
 	case NOP:
 		break;
 	}
-	if (this->is_vector_type(m)) {
+	if (instr::is_vector_type(m)) {
 		if (this->curr_instr->mnemonic != LOADV &&
 			this->curr_instr->mnemonic != STOREV) {
 			this->curr_instr->operands.vector.slot_one = v1;
diff --git a/src/id.cc b/src/id.cc
index e4790ef..a853602 100644
--- a/src/id.cc
+++ b/src/id.cc
@@ -153,7 +153,7 @@ void ID::decode_R_type(signed int &s1)
 	s2 = GET_MID_BITS(s1, s0b, s1b);
 	s1 = GET_LS_BITS(s1, s0b);
 
-	if (this->is_vector_type(this->curr_instr->mnemonic)) {
+	if (instr::is_vector_type(this->curr_instr->mnemonic)) {
 		r1 = this->read_vec_guard(
 			s1, this->curr_instr->operands.vector.slot_one);
 		r2 = this->read_vec_guard(
diff --git a/src/instr.cc b/src/instr.cc
index 9bd951b..0282be3 100644
--- a/src/instr.cc
+++ b/src/instr.cc
@@ -37,4 +37,19 @@ const std::unordered_map<unsigned int, Mnemonic> mnemonic_map = {
 	{0b0011010, BUF},	 {0b0011110, BOF},	 {0b0100010, PUSH},
 	{0b0100110, POP},	 {0b0101010, RET},
 };
+
+bool is_vector_type(Mnemonic m)
+{
+	return (
+		m == ADDV || m == SUBV || m == MULV || m == DIVV || m == CEV ||
+		m == LOADV || m == STOREV);
+}
+
+bool is_logical_type(Mnemonic m)
+{
+	return (
+		m == ANDI || m == ORI || m == XORI || m == AND || m == OR || m == XOR ||
+		m == NOT);
+}
+
 } // namespace instr
diff --git a/src/stage.cc b/src/stage.cc
index 4eab7d3..7db3539 100644
--- a/src/stage.cc
+++ b/src/stage.cc
@@ -71,20 +71,6 @@ InstrDTO *Stage::advance(Response p)
 	return r;
 }
 
-bool Stage::is_vector_type(Mnemonic m)
-{
-	return (
-		m == ADDV || m == SUBV || m == MULV || m == DIVV || m == CEV ||
-		m == LOADV || m == STOREV);
-}
-
-bool Stage::is_logical(Mnemonic m)
-{
-	return (
-		m == ANDI || m == ORI || m == XORI || m == AND || m == OR || m == XOR ||
-		m == NOT);
-}
-
 InstrDTO *Stage::get_instr() { return this->curr_instr; }
 
 void Stage::set_condition(CC c, bool v)
diff --git a/src/wb.cc b/src/wb.cc
index 0dae5f2..12f4edf 100644
--- a/src/wb.cc
+++ b/src/wb.cc
@@ -18,6 +18,7 @@
 #include "wb.h"
 #include "instrDTO.h"
 #include "response.h"
+#include "instr.h"
 #include "stage.h"
 #include <algorithm>
 #include <array>
@@ -51,8 +52,8 @@ void WB::write_handler()
 
 	this->checked_out.pop_front();
 	reg = this->curr_instr->checked_out;
-	
-	if(this->is_vector_type(this->curr_instr->mnemonic)) {
+
+	if(instr::is_vector_type(this->curr_instr->mnemonic)) {
 		if(this->curr_instr->mnemonic != STOREV && this->curr_instr->mnemonic != LOADV) {
 			this->store_register<std::array<signed int, V_R_LIMIT>>(reg, this->curr_instr->operands.vector.slot_one);
 		} else {
-- 
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