From 3221a2c310afb6ed124d6b67afda110d4b8dcade Mon Sep 17 00:00:00 2001 From: bd Date: Thu, 6 Mar 2025 01:35:27 -0500 Subject: Allow sidedoor free access to writing memory --- tests/dram.cc | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) (limited to 'tests') diff --git a/tests/dram.cc b/tests/dram.cc index 55d4d24..e98abc1 100644 --- a/tests/dram.cc +++ b/tests/dram.cc @@ -234,3 +234,42 @@ TEST_CASE( delete d; } + +TEST_CASE( + "Sidedoor bypasses delay", + "[dram]") +{ + Dram *d = new Dram(1, 3); + std::array expected = {0, 0, 0, 0}; + std::array actual = d->view(0, 1)[0]; + CHECK(expected == actual); + + signed int w1 = 0x11223344; + signed int w2 = 0x55667788; + + // MEMORY CYCLE 1 + Response *r = d->write(MEMORY, w1, 0x00000000); + actual = d->view(0, 1)[0]; + REQUIRE(expected == actual); + REQUIRE(r->status == WAIT); + delete r; + + // MEMORY CYCLE 2 + actual = d->view(0, 1)[0]; + r = d->write(MEMORY, w1, 0x00000000); + actual = d->view(0, 1)[0]; + REQUIRE(expected == actual); + REQUIRE(r->status == WAIT); + delete r; + // SIDE CYCLE 1 + r = d->write(SIDE, w2, 0x00000001); + actual = d->view(0, 1)[0]; + REQUIRE(r->status == OK); + delete r; + + expected.at(1) = w2; + actual = d->view(0, 1)[0]; + CHECK(expected == actual); + + delete d; +} -- cgit v1.2.3