From 1ba3929b633b35a2131960b5344359478594626a Mon Sep 17 00:00:00 2001 From: bd Date: Mon, 7 Apr 2025 16:15:31 -0400 Subject: Update README --- README.md | 32 +++++++++++++++++++++++++------- 1 file changed, 25 insertions(+), 7 deletions(-) (limited to 'README.md') diff --git a/README.md b/README.md index d797781..58c8201 100644 --- a/README.md +++ b/README.md @@ -1,12 +1,30 @@ -# RISC V[ECTOR] Assembler +# rva + + _/_/ _/_/ + _/ _/ + _/ _/ _/_/ _/ _/ _/_/_/ _/ + _/ _/_/ _/ _/ _/ _/ _/ + _/ _/ _/ _/ _/ _/ _/ + _/ _/ _/ _/_/_/ _/ + _/_/ _/_/ + +This is an assembler for the custom ISA nicknamed "RISC V[ECTOR]". It takes in an assembly program syntactically similar to MIPS (see input) and outputs a list of binary numbers corresponding to the instructions. This the output is compatible with the [RISC V[ECTOR]](https://github.com/bdunahu/RISC-V-ECTOR-) simulator. ## Dependencies -- SBCL -- ASDF -- fiveam -- clingon +A common-lisp implementation (SBCL) and the following libraries are required to compile: + +- SBCL (tested with v2.5.2) +- ASDF (tested with v3.3.7) +- fiveam (tested with v3.3.7) +- clingon (tested with v0.5.0-1.f2a730f) +- trivia (tested with v0.1-0.8b406c3) + +## To run + +Run `make` to produce a binary file in `/bin/`. To run the unit tests, run `make test`. See the make file for further options. -## To compile +# About -make +Created at the University of Massachusetts, Amherst +CS535 -- Computer Architecture and ISA Design \ No newline at end of file -- cgit v1.2.3