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authorbd <bdunahu@operationnull.com>2025-03-06 00:34:35 -0500
committerbd <bdunahu@operationnull.com>2025-03-06 00:34:35 -0500
commit3322aa0845f7fe9cc98aa4e429bd5ecf72a5c27e (patch)
tree75f627ee8e75c0763ab8b048496464c60e486490 /inc/cache.h
parent20fe698a4074df4abe02f14a1a14481770e90abc (diff)
dram write (no delay, no accessor tracking
Diffstat (limited to 'inc/cache.h')
-rw-r--r--inc/cache.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/inc/cache.h b/inc/cache.h
index 4d143aa..312f3d1 100644
--- a/inc/cache.h
+++ b/inc/cache.h
@@ -8,7 +8,7 @@ class Cache : public Storage
/**
* Constructor.
* @param The number of `lines` contained in memory. The total number of
- * words is this number multiplied by 4.
+ * words is this number multiplied by LINE_SIZE.
* @param The next lowest level in storage. Methods from this object are
* called in case of a cache miss.
* @param The number of clock cycles each access takes.