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authorbd <bdunahu@operationnull.com>2025-03-09 20:15:45 -0400
committerbd <bdunahu@operationnull.com>2025-03-09 20:15:45 -0400
commit9bd18b0499d5096bc91b09a2d26e700ca1560de4 (patch)
tree196b3ac11d3648e29d67fb261ed0f78720719b94 /inc/cache.h
parent5cf5ebce233cc49cc04ac8c7713e12e87bab7798 (diff)
Untested implementation for loading absent data into cache
Diffstat (limited to 'inc/cache.h')
-rw-r--r--inc/cache.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/inc/cache.h b/inc/cache.h
index a317f5d..c8c9736 100644
--- a/inc/cache.h
+++ b/inc/cache.h
@@ -30,17 +30,17 @@ class Cache : public Storage
/**
* Fetches `address` from a lower level of storage if it is not already
* present. If it is not, temporarily sets the is_blocked attribute of this
- * cache level to true.
+ * cache level to true, and the victim line is chosen/written back.
* @param the address that must be present in cache.
*/
void fetch_resource(int address);
/**
- * An array of paired bits.
- * If the least significant bit of an element is set, the corresponding
- * element in `data` is invalid. If the most significant bit of an element
- * is set, the corresponding element in `data` is dirty.
+ * An array of metadata about elements in `data`.
+ * If the first value of an element is negative, the corresponding
+ * element in `data` is invalid. If the most second value of an element
+ * is nonzero, the corresponding element in `data` is dirty.
*/
- std::array<std::bitset<2>, L1_CACHE_SIZE> stat;
+ std::array<std::array<int, 2>, L1_CACHE_SIZE> meta;
};
#endif /* CACHE_H_INCLUDED */