Merge pull request #30 from bdunahu/bdunahu

Add controller.h, implementation and tests.

2 files changed, 6 insertions, 3 deletions

diff --git a/inc/definitions.h b/inc/definitions.h
index eced554..ff2f7c6 100644
--- a/inc/definitions.h
+++ b/inc/definitions.h
@@ -32,7 +32,7 @@
 #define L1_CACHE_LINES static_cast<int>(pow(2, L1_CACHE_LINE_SPEC))
 
 /**
- * The total number of cycles a memory access takes.
+ * The total number of cycles a memory access takes
  */
 #define MEM_DELAY 3
 
@@ -42,6 +42,11 @@
 #define L1_CACHE_DELAY 0
 
 /**
+ * The number of general purpose registers
+ */
+#define GPR_NUM 16
+
+/**
  * Return the N least-significant bits from integer K using a bit mask
  * @param the integer to be parsed
  * @param the number of bits to be parsed
diff --git a/inc/dram.h b/inc/dram.h
index e6db633..f4d175e 100644
--- a/inc/dram.h
+++ b/inc/dram.h
@@ -9,8 +9,6 @@ class Dram : public Storage
   public:
 	/**
 	 * Constructor.
-	 * @param The number of `lines` contained in memory. The total number of
-	 * words is this number multiplied by LINE_SIZE.
 	 * @param The number of clock cycles each access takes.
 	 * @return A new memory object.
 	 */