enforce single unit per clock cycle, order to serve storage requests

2 files changed, 14 insertions, 9 deletions

diff --git a/src/storage/dram.cc b/src/storage/dram.cc
index 4c4ca84..32f3fbb 100644
--- a/src/storage/dram.cc
+++ b/src/storage/dram.cc
@@ -2,14 +2,15 @@
 #include "definitions.h"
 #include "response.h"
 #include <algorithm>
+#include <iostream>
 
 Dram::Dram(int lines, int delay)
 {
 	this->data = new std::vector<std::array<signed int, LINE_SIZE>>;
 	this->data->resize(lines);
 	this->delay = delay;
+	this->wait_time = this->delay;
 	this->lower = nullptr;
-	this->servicing = IDLE;
 }
 
 Dram::~Dram() { delete this->data; }
@@ -23,17 +24,12 @@ Response Dram::write(Accessor accessor, signed int data, int address)
 		r = OK;
 	} else {
 		/* Do this first--then process the first cycle immediately. */
-		if (this->servicing == IDLE) {
-			this->servicing = accessor;
-			this->wait_time = delay;
-		}
+		this->deque.push_back(accessor);
 
-		if (this->servicing == accessor) {
+		if (this->deque.front() == accessor) {
 			if (this->wait_time == 0) {
 				this->do_write(data, address);
 				r = OK;
-			} else {
-				--this->wait_time;
 			}
 		}
 	}
diff --git a/src/storage/storage.cc b/src/storage/storage.cc
index 024699b..429ac2b 100644
--- a/src/storage/storage.cc
+++ b/src/storage/storage.cc
@@ -18,6 +18,15 @@ void Storage::do_write(signed data, int address)
 	int line = address / LINE_SIZE;
 	int word = address % LINE_SIZE;
 
-	this->servicing = IDLE;
 	this->data->at(line).at(word) = data;
 }
+
+void Storage::resolve()
+{
+	if (this->wait_time == 0) {
+		this->deque.pop_front();
+		this->wait_time = delay;
+	} else {
+		--this->wait_time;
+	}
+}