First part of storage rework (see description)

- Removed response enum.
- Removed messy ostream override, and cli.cc test class
- Removed accessor enum, and instead used unique pointer to identify accessor.
- Simplified storage by removing is_waiting variables.
- Rewrote DRAM and Cache to use Storage constructor.

2 files changed, 141 insertions, 198 deletions

diff --git a/tests/cache.cc b/tests/cache.cc
index 0b04bce..313f93f 100644
--- a/tests/cache.cc
+++ b/tests/cache.cc
@@ -11,21 +11,28 @@ class CacheFixture
 		this->c_delay = 2;
 		this->d = new Dram(this->m_delay);
 		this->c = new Cache(this->d, this->c_delay);
+		this->mem = new int;
+		this->fetch = new int;
 		this->expected = {0, 0, 0, 0};
 		this->actual = this->c->view(0, 1)[0];
 	}
 
-	~CacheFixture() { delete this->c; }
+	~CacheFixture()
+	{
+		delete this->c;
+		delete this->mem;
+		delete this->fetch;
+	}
 
 	/**
 	 * An operation that is done a lot.
 	 */
 	void
-	wait_for_storage(int delay, Response expected, std::function<Response()> f)
+	wait_for_storage(int delay, int expected, std::function<int()> f)
 	{
 		for (int i = 0; i < delay; ++i) {
-			Response r = f();
-			
+			int r = f();
+
 			// check response
 			CHECK(r == expected);
 			// check for early modifications
@@ -38,29 +45,27 @@ class CacheFixture
 	int c_delay;
 	Cache *c;
 	Dram *d;
+	int *mem;
+	int *fetch;
 	std::array<signed int, LINE_SIZE> expected;
 	std::array<signed int, LINE_SIZE> actual;
 };
 
 TEST_CASE_METHOD(CacheFixture, "store 0th element in DELAY cycles", "[dram]")
 {
-	Response r;
+	int r;
 	signed int w;
 	CHECK(expected == actual);
 
 	w = 0x11223344;
 	// delay + 1 due to internal logic, when mem
 	// finishes handle_miss still returns 'blocked'
-	this->wait_for_storage(this->m_delay + 1, BLOCKED, [this, w]() {
-		return this->c->write_word(MEM, w, 0b0);
-	});
-
-	this->wait_for_storage(this->c_delay, WAIT, [this, w]() {
-		return this->c->write_word(MEM, w, 0b0);
+	this->wait_for_storage(this->m_delay + this->c_delay + 1, 0, [this, w]() {
+		return this->c->write_word(this->mem, w, 0b0);
 	});
 
-	r = c->write_word(MEM, w, 0b0);
-	CHECK(r == OK);
+	r = c->write_word(this->mem, w, 0b0);
+	CHECK(r);
 
 	actual = this->d->view(0, 1)[0];
 	// we do NOT write back now!
@@ -71,43 +76,28 @@ TEST_CASE_METHOD(CacheFixture, "store 0th element in DELAY cycles", "[dram]")
 	REQUIRE(expected == actual);
 }
 
-TEST_CASE_METHOD(
-	CacheFixture,
-	"store 0th, 1st element in DELAY cycles, with conflict",
-	"[cache]")
+TEST_CASE_METHOD(CacheFixture, "store 0th, 1st element in DELAY cycles, with conflict", "[cache]")
 {
-	Response r;
 	signed int w;
-	int i;
+	int r, i;
 	CHECK(expected == actual);
 
 	w = 0x11223344;
 	// delay + 1 due to internal logic, when mem
 	// finishes handle_miss still returns 'blocked'
-	for (i = 0; i < this->m_delay + 1; ++i) {
-		r = c->write_word(MEM, w, 0b0);
-		CHECK(r == BLOCKED);
-		r = c->write_word(FETCH, w, 0b1);
-		CHECK(r == WAIT);
-		
-		// check for early modifications
-		actual = c->view(0, 1)[0];
-		REQUIRE(this->expected == this->actual);
-	}
+	for (i = 0; i < this->m_delay + this->c_delay + 1; ++i) {
+		r = c->write_word(this->mem, w, 0b0);
+		CHECK(!r);
+		r = c->write_word(this->fetch, w, 0b1);
+		CHECK(!r);
 
-	for (i = 0; i < this->c_delay; ++i) {
-		r = c->write_word(MEM, w, 0b0);
-		CHECK(r == WAIT);
-		r = c->write_word(FETCH, w, 0b1);
-		CHECK(r == WAIT);
-		
 		// check for early modifications
 		actual = c->view(0, 1)[0];
 		REQUIRE(this->expected == this->actual);
 	}
 
-	r = c->write_word(MEM, w, 0b0);
-	CHECK(r == OK);
+	r = c->write_word(this->mem, w, 0b0);
+	CHECK(r);
 
 	actual = d->view(0, 1)[0];
 	// we do NOT write back now!
@@ -118,69 +108,57 @@ TEST_CASE_METHOD(
 	REQUIRE(expected == actual);
 
 	// this should have been loaded already!
-	this->wait_for_storage(this->c_delay, WAIT, [this, w]() {
-		return this->c->write_word(FETCH, w, 0b1);
-	});
+	this->wait_for_storage(
+		this->c_delay, 0, [this, w]() { return this->c->write_word(this->fetch, w, 0b1); });
+
+	r = c->write_word(this->fetch, w, 0b1);
+	CHECK(r);
 
-	r = c->write_word(FETCH, w, 0b1);
-	CHECK(r == OK);
-	
 	expected.at(1) = w;
 	actual = c->view(0, 1)[0];
 	REQUIRE(expected == actual);
 }
 
 TEST_CASE_METHOD(
-	CacheFixture,
-	"store 0th, 1st element different tags, in DELAY cycles, no conflict",
-	"[cache]")
+	CacheFixture, "store 0th, 1st element different tags, in DELAY cycles, no conflict", "[cache]")
 {
-	Response r;
+	int r;
 	signed int w;
 	CHECK(expected == actual);
 
 	w = 0x11223344;
 	// delay + 1 due to internal logic, when mem
 	// finishes handle_miss still returns 'blocked'
-	this->wait_for_storage(this->m_delay + 1, BLOCKED, [this, w]() {
-		return this->c->write_word(MEM, w, 0b0);
+	this->wait_for_storage(this->m_delay + this->c_delay + 1, 0, [this, w]() {
+		return this->c->write_word(this->mem, w, 0b0);
 	});
 
-	this->wait_for_storage(this->c_delay, WAIT, [this, w]() {
-		return this->c->write_word(MEM, w, 0b0);
-	});	
+	r = c->write_word(this->mem, w, 0b0);
+	CHECK(r);
 
-	r = c->write_word(MEM, w, 0b0);
-	CHECK(r == OK);
-	
 	expected.at(0) = w;
 	actual = c->view(0, 1)[0];
 	REQUIRE(expected == actual);
 
 	// write back to memory
-	this->wait_for_storage(this->m_delay + 1, BLOCKED, [this, w]() {
-		return this->c->write_word(FETCH, w, 0b10000001);
-	});
-
 	// fetch new address (don't run the completion cycle yet)
-	this->wait_for_storage(this->m_delay, BLOCKED, [this, w]() {
-		return this->c->write_word(FETCH, w, 0b10000001);
+	this->wait_for_storage(this->m_delay + this->m_delay + 1, 0, [this, w]() {
+		return this->c->write_word(this->fetch, w, 0b10000001);
 	});
 
 	// after the fetch, this cache line should be empty
-	this->c->write_word(FETCH, w, 0b10000001);
-	CHECK(r == OK);
-	
+	this->c->write_word(this->fetch, w, 0b10000001);
+	CHECK(r);
+
 	expected.at(0) = 0;
 	actual = c->view(0, 1)[0];
 	CHECK(expected == actual);
 
-	this->wait_for_storage(this->c_delay, WAIT, [this, w]() {
-		return this->c->write_word(FETCH, w, 0b10000001);
-	});	
+	this->wait_for_storage(
+		this->c_delay, 0, [this, w]() { return this->c->write_word(this->fetch, w, 0b10000001); });
 
-	r = c->write_word(FETCH, w, 0b10000001);
-	CHECK(r == OK);
+	r = c->write_word(this->fetch, w, 0b10000001);
+	CHECK(r);
 
 	expected.at(0) = 0;
 	expected.at(1) = w;
diff --git a/tests/dram.cc b/tests/dram.cc
index 0e97e81..086ca4a 100644
--- a/tests/dram.cc
+++ b/tests/dram.cc
@@ -9,23 +9,27 @@ class DramFixture
 	{
 		this->delay = 3;
 		this->d = new Dram(this->delay);
+		this->mem = new int;
+		this->fetch = new int;
 		this->expected = {0, 0, 0, 0};
 		this->actual = this->d->view(0, 1)[0];
 	}
 
-	~DramFixture() { delete this->d; }
+	~DramFixture()
+	{
+		delete this->d;
+		delete this->mem;
+		delete this->fetch;
+	}
 
-	/**
-	 * An operation that is done a lot.
-	 */
 	void
-	wait_for_storage(int delay, Response expected, std::function<Response()> f)
+	wait_for_storage(int delay, std::function<int()> f)
 	{
 		for (int i = 0; i < delay; ++i) {
-			Response r = f();
+			int r = f();
 
 			// check response
-			CHECK(r == expected);
+			CHECK(!r);
 			// check for early modifications
 			actual = d->view(0, 1)[0];
 			REQUIRE(this->expected == this->actual);
@@ -34,95 +38,84 @@ class DramFixture
 
 	int delay;
 	Dram *d;
+	int *mem;
+	int *fetch;
 	std::array<signed int, LINE_SIZE> expected;
 	std::array<signed int, LINE_SIZE> actual;
 };
 
 TEST_CASE_METHOD(DramFixture, "store 0th element in DELAY cycles", "[dram]")
 {
-	Response r;
+	int r;
 	signed int w;
 	CHECK(expected == actual);
 
 	w = 0x11223344;
-	this->wait_for_storage(this->delay, WAIT, [this, w]() {
-		return this->d->write_word(MEM, w, 0x0);
-	});
+	this->wait_for_storage(this->delay, [this, w]() { return this->d->write_word(this->mem, w, 0x0); });
 
-	r = this->d->write_word(MEM, w, 0x0);
+	r = this->d->write_word(this->mem, w, 0x0);
 
-	CHECK(r == OK);
+	CHECK(r);
 	expected.at(0) = w;
 	actual = this->d->view(0, 1)[0];
 	REQUIRE(expected == actual);
 }
 
-TEST_CASE_METHOD(
-	DramFixture,
-	"store 0th, 1st element in DELAY cycles, no conflict",
-	"[dram]")
+TEST_CASE_METHOD(DramFixture, "store 0th, 1st element in DELAY cycles, no conflict", "[dram]")
 {
-	Response r;
+	int r;
 	signed int w;
 	CHECK(expected == actual);
 
 	w = 0x11223344;
-	this->wait_for_storage(this->delay, WAIT, [this, w]() {
-		return this->d->write_word(MEM, w, 0x0);
-	});
+	this->wait_for_storage(this->delay, [this, w]() { return this->d->write_word(this->mem, w, 0x0); });
 
-	r = d->write_word(MEM, w, 0x0);
-	REQUIRE(r == OK);
+	r = d->write_word(this->mem, w, 0x0);
+	REQUIRE(r);
 
 	expected.at(0) = w;
 	actual = d->view(0, 1)[0];
 	REQUIRE(expected == actual);
 
-	this->wait_for_storage(this->delay, WAIT, [this, w]() {
-		return this->d->write_word(FETCH, w, 0x1);
-	});
+	this->wait_for_storage(this->delay, [this, w]() { return this->d->write_word(this->fetch, w, 0x1); });
 
-	r = d->write_word(FETCH, w, 0x1);
-	CHECK(r == OK);
+	r = d->write_word(this->fetch, w, 0x1);
+	CHECK(r);
 
 	actual = d->view(0, 1)[0];
 	expected.at(1) = w;
 	REQUIRE(expected == actual);
 }
 
-TEST_CASE_METHOD(
-	DramFixture, "store 0th element in DELAY cycles with conflict", "[dram]")
+TEST_CASE_METHOD(DramFixture, "store 0th element in DELAY cycles with conflict", "[dram]")
 {
-	Response r;
+	int r, i;
 	signed int w;
-	int i;
 	CHECK(expected == actual);
 
 	w = 0x11223344;
 	for (i = 0; i < this->delay; ++i) {
-		r = this->d->write_word(MEM, w, 0x0);
-		CHECK(r == WAIT);
-		r = this->d->write_word(FETCH, w, 0x1);
-		CHECK(r == WAIT);
+		r = this->d->write_word(this->mem, w, 0x0);
+		CHECK(!r);
+		r = this->d->write_word(this->fetch, w, 0x1);
+		CHECK(!r);
 
 		// check for early modifications
 		actual = d->view(0, 1)[0];
 		REQUIRE(expected == actual);
 	}
 
-	r = d->write_word(MEM, w, 0x0);
-	REQUIRE(r == OK);
+	r = d->write_word(this->mem, w, 0x0);
+	REQUIRE(r);
 
 	expected.at(0) = w;
 	actual = d->view(0, 1)[0];
 	REQUIRE(expected == actual);
 
-	this->wait_for_storage(this->delay, WAIT, [this, w]() {
-		return this->d->write_word(FETCH, w, 0x1);
-	});
+	this->wait_for_storage(this->delay, [this, w]() { return this->d->write_word(this->fetch, w, 0x1); });
 
-	r = d->write_word(FETCH, w, 0x1);
-	CHECK(r == OK);
+	r = d->write_word(this->fetch, w, 0x1);
+	CHECK(r);
 
 	actual = d->view(0, 1)[0];
 	expected.at(1) = w;
@@ -131,95 +124,88 @@ TEST_CASE_METHOD(
 
 TEST_CASE_METHOD(DramFixture, "store line in DELAY cycles", "[dram]")
 {
-	Response r;
+	int r;
 	signed int w;
 	std::array<signed int, LINE_SIZE> buffer;
 	CHECK(expected == actual);
 
 	w = 0x11223344;
 	buffer = {w, w + 1, w + 2, w + 3};
-	this->wait_for_storage(this->delay, WAIT, [this, w, buffer]() {
-		return this->d->write_line(MEM, buffer, 0x0);
-	});
+	this->wait_for_storage(
+		this->delay, [this, w, buffer]() { return this->d->write_line(this->mem, buffer, 0x0); });
 
-	r = d->write_line(MEM, buffer, 0x0);
-	CHECK(r == OK);
+	r = d->write_line(this->mem, buffer, 0x0);
+	CHECK(r);
 
 	actual = d->view(0, 1)[0];
 	expected = buffer;
 	REQUIRE(expected == actual);
 }
 
-TEST_CASE_METHOD(
-	DramFixture, "store line in DELAY cycles no conflict", "[dram]")
+TEST_CASE_METHOD(DramFixture, "store line in DELAY cycles no conflict", "[dram]")
 {
-	Response r;
+	int r;
 	signed int w;
 	std::array<signed int, LINE_SIZE> buffer;
 	CHECK(expected == actual);
 
 	w = 0x11223344;
 	buffer = {w, w + 1, w + 2, w + 3};
-	this->wait_for_storage(this->delay, WAIT, [this, w, buffer]() {
-		return this->d->write_line(MEM, buffer, 0x0);
-	});
+	this->wait_for_storage(
+		this->delay, [this, w, buffer]() { return this->d->write_line(this->mem, buffer, 0x0); });
 
-	r = this->d->write_line(MEM, buffer, 0x0);
-	REQUIRE(r == OK);
+	r = this->d->write_line(this->mem, buffer, 0x0);
+	REQUIRE(r);
 
 	expected = buffer;
 	actual = d->view(0, 1)[0];
 	REQUIRE(expected == actual);
 
 	buffer = {w + 4, w + 5, w + 6, w + 7};
-	this->wait_for_storage(this->delay, WAIT, [this, w, buffer]() {
-		return this->d->write_line(FETCH, buffer, 0x1);
-	});
+	this->wait_for_storage(
+		this->delay, [this, w, buffer]() { return this->d->write_line(this->fetch, buffer, 0x1); });
 
-	r = this->d->write_line(FETCH, buffer, 0x1);
-	CHECK(r == OK);
+	r = this->d->write_line(this->fetch, buffer, 0x1);
+	CHECK(r);
 
 	expected = buffer;
 	actual = d->view(0, 1)[0];
 	REQUIRE(expected == actual);
 }
 
-TEST_CASE_METHOD(
-	DramFixture, "store line in DELAY cycles with conflict", "[dram]")
+TEST_CASE_METHOD(DramFixture, "store line in DELAY cycles with conflict", "[dram]")
 {
-	Response r;
+	int r, i;
 	signed int w;
-	int i;
 	std::array<signed int, LINE_SIZE> buffer;
 	CHECK(expected == actual);
 
 	w = 0x11223344;
 	buffer = {w, w + 1, w + 2, w + 3};
 	for (i = 0; i < this->delay; ++i) {
-		r = this->d->write_line(MEM, buffer, 0x0);
-		CHECK(r == WAIT);
-		r = d->write_line(FETCH, buffer, 0x1);
-		CHECK(r == WAIT);
+		r = this->d->write_line(this->mem, buffer, 0x0);
+		CHECK(!r);
+		r = d->write_line(this->fetch, buffer, 0x1);
+		CHECK(!r);
 
 		// check for early modifications
 		actual = d->view(0, 1)[0];
 		REQUIRE(expected == actual);
 	}
 
-	r = d->write_line(MEM, buffer, 0x0);
-	CHECK(r == OK);
+	r = d->write_line(this->mem, buffer, 0x0);
+	CHECK(r);
 
 	actual = d->view(0, 1)[0];
 	expected = buffer;
 	REQUIRE(expected == actual);
 
 	buffer = {w + 4, w + 5, w + 6, w + 7};
-	this->wait_for_storage(this->delay, WAIT, [this, w, buffer]() {
-		return this->d->write_line(FETCH, buffer, 0x1);
-	});
+	this->wait_for_storage(
+		this->delay, [this, w, buffer]() { return this->d->write_line(this->fetch, buffer, 0x1); });
 
-	r = this->d->write_line(FETCH, buffer, 0x1);
-	CHECK(r == OK);
+	r = this->d->write_line(this->fetch, buffer, 0x1);
+	CHECK(r);
 
 	expected = buffer;
 	actual = d->view(0, 1)[0];
@@ -227,71 +213,65 @@ TEST_CASE_METHOD(
 }
 
 TEST_CASE_METHOD(
-	DramFixture,
-	"store line in DELAY cycles, read in DELAY cycles, no conflict",
-	"[dram]")
+	DramFixture, "store line in DELAY cycles, read in DELAY cycles, no conflict", "[dram]")
 {
-	Response r;
+	int r, i, addr;
 	signed int w;
-	int i, addr;
 	CHECK(expected == actual);
 
 	w = 0x11223311;
 	addr = 0x0;
 	expected = {w, w + 1, w + 2, w + 3};
 	for (i = 0; i < this->delay; ++i) {
-		r = d->write_line(MEM, expected, addr);
-		CHECK(r == WAIT);
+		r = d->write_line(this->mem, expected, addr);
+		CHECK(!r);
 	}
-	r = d->write_line(MEM, expected, addr);
-	CHECK(r == OK);
+	r = d->write_line(this->mem, expected, addr);
+	CHECK(r);
 
 	for (i = 0; i < this->delay; ++i) {
-		r = d->read_line(MEM, addr, actual);
+		r = d->read_line(this->mem, addr, actual);
 
-		CHECK(r == WAIT);
+		CHECK(!r);
 		REQUIRE(expected != actual);
 	}
 
-	r = d->read_line(MEM, addr, actual);
+	r = d->read_line(this->mem, addr, actual);
 
-	CHECK(r == OK);
+	CHECK(r);
 	REQUIRE(expected == actual);
 }
 
 TEST_CASE_METHOD(
-	DramFixture,
-	"store line in DELAY cycles, read in DELAY cycles with conflict",
-	"[dram]")
+	DramFixture, "store line in DELAY cycles, read in DELAY cycles with conflict", "[dram]")
 {
-	Response r;
+	int r, i, addr;
 	signed int w;
-	int i, addr;
 	CHECK(expected == actual);
 
 	w = 0x11223311;
 	addr = 0x0;
 	expected = {w, w + 1, w + 2, w + 3};
 	for (i = 0; i < delay; ++i) {
-		r = d->write_line(MEM, expected, addr);
-		CHECK(r == WAIT);
+		r = d->write_line(this->mem, expected, addr);
+		CHECK(!r);
 
-		r = d->read_line(FETCH, addr, actual);
-		CHECK(r == WAIT);
+		r = d->read_line(this->fetch, addr, actual);
+		CHECK(!r);
 	}
-	r = d->write_line(MEM, expected, addr);
-	CHECK(r == OK);
+	r = d->write_line(this->mem, expected, addr);
+	CHECK(r);
 
 	for (i = 0; i < this->delay; ++i) {
-		r = d->read_line(MEM, addr, actual);
+		r = d->read_line(this->mem, addr, actual);
 
-		CHECK(r == WAIT);
+		CHECK(!r);
 		REQUIRE(expected != actual);
 	}
 
-	r = d->read_line(MEM, addr, actual);
+	r = d->read_line(this->mem, addr, actual);
 
-	CHECK(r == OK);
+	CHECK(r);
 	REQUIRE(expected == actual);
 }
 
@@ -301,7 +281,7 @@ TEST_CASE_METHOD(
 	"with conflict",
 	"[dram]")
 {
-	Response r;
+	int r;
 	signed int w, a;
 	int i, j, addr;
 	CHECK(expected == actual);
@@ -311,41 +291,26 @@ TEST_CASE_METHOD(
 	addr = 0x0;
 	expected = {w, w + 1, w + 2, w + 3};
 	for (i = 0; i < this->delay; ++i) {
-		r = d->write_line(MEM, expected, addr);
-		CHECK(r == WAIT);
+		r = d->write_line(this->mem, expected, addr);
+		CHECK(!r);
 	}
-	r = d->write_line(MEM, expected, addr);
-	CHECK(r == OK);
+	r = d->write_line(this->mem, expected, addr);
+	CHECK(r);
 
 	actual = d->view(0, 1)[0];
 	REQUIRE(expected == actual);
 
 	for (i = 0; i < LINE_SIZE; ++i) {
 		for (j = 0; j < this->delay; ++j) {
-			r = d->read_word(MEM, addr, a);
+			r = d->read_word(this->mem, addr, a);
 
-			CHECK(r == WAIT);
+			CHECK(!r);
 			REQUIRE(0x0 == a);
 		}
-		r = d->read_word(MEM, addr++, a);
-		CHECK(r == OK);
+		r = d->read_word(this->mem, addr++, a);
+		CHECK(r);
 		REQUIRE(w++ == a);
 
 		a = 0;
 	}
 }
-
-TEST_CASE_METHOD(DramFixture, "Sidedoor bypasses delay", "[dram]")
-{
-	Response r;
-	signed int w;
-	CHECK(expected == actual);
-
-	w = 0x11223344;
-	r = this->d->write_word(SIDE, w, 0x0);
-	CHECK(r == OK);
-
-	expected.at(0) = w;
-	actual = d->view(0, 1)[0];
-	REQUIRE(expected == actual);
-}