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authorbd <bdunahu@operationnull.com>2025-03-30 00:28:55 -0400
committerbd <bdunahu@operationnull.com>2025-03-30 00:28:55 -0400
commit8e56373a5436852fe9c7934e03d7b57493625003 (patch)
treefd61e2ed0419fea1d531c39d95df1986cd1c8bb5
parentdf747f79abecc53e7ff696e020caf856746bad0d (diff)
Minor simplification to API between pipeline components
-rw-r--r--inc/controller.h2
-rw-r--r--inc/ex.h2
-rw-r--r--inc/id.h2
-rw-r--r--inc/if.h2
-rw-r--r--inc/mm.h2
-rw-r--r--inc/stage.h2
-rw-r--r--inc/wb.h4
-rw-r--r--src/sim/controller.cc9
-rw-r--r--src/sim/ex.cc2
-rw-r--r--src/sim/id.cc12
-rw-r--r--src/sim/if.cc10
-rw-r--r--src/sim/mm.cc4
-rw-r--r--src/sim/wb.cc2
-rw-r--r--tests/if.cc82
14 files changed, 74 insertions, 63 deletions
diff --git a/inc/controller.h b/inc/controller.h
index ac83a78..1c7b2d6 100644
--- a/inc/controller.h
+++ b/inc/controller.h
@@ -36,7 +36,7 @@ class Controller : public Stage
* @return the pc.
*/
int get_pc();
- Response advance(InstrDTO &i, Response p) override;
+ InstrDTO *advance(Response p) override;
};
#endif /* CONTROLLER_H_INCLUDED */
diff --git a/inc/ex.h b/inc/ex.h
index e67980d..2ca8876 100644
--- a/inc/ex.h
+++ b/inc/ex.h
@@ -14,7 +14,7 @@ class EX : public Stage
*/
EX(Stage *next);
- Response advance(InstrDTO &next_instr, Response p) override;
+ InstrDTO *advance(Response p) override;
};
#endif /* EX_H_INCLUDED */
diff --git a/inc/id.h b/inc/id.h
index 49637ce..c5c1f1d 100644
--- a/inc/id.h
+++ b/inc/id.h
@@ -15,7 +15,7 @@ class ID : public Stage
*/
ID(Stage *next);
- Response advance(InstrDTO &next_instr, Response p) override;
+ InstrDTO *advance(Response p) override;
/* The following methods are made public so that they may be tested, and are
* not to be called from outside classes during standard execution.
diff --git a/inc/if.h b/inc/if.h
index 3fafe53..d58b06a 100644
--- a/inc/if.h
+++ b/inc/if.h
@@ -15,7 +15,7 @@ class IF : public Stage
*/
IF(Stage *next);
- Response advance(InstrDTO &next_instr, Response p) override;
+ InstrDTO *advance(Response p) override;
private:
/**
diff --git a/inc/mm.h b/inc/mm.h
index 0d2ce82..6081802 100644
--- a/inc/mm.h
+++ b/inc/mm.h
@@ -14,7 +14,7 @@ class MM : public Stage
*/
MM(Stage *next);
- Response advance(InstrDTO &next_instr, Response p) override;
+ InstrDTO *advance(Response p) override;
};
#endif /* MM_H_INCLUDED */
diff --git a/inc/stage.h b/inc/stage.h
index b68293b..50c413a 100644
--- a/inc/stage.h
+++ b/inc/stage.h
@@ -27,7 +27,7 @@ class Stage
* @return a response, indicating whether this pipeline stage is stalling,
* busy, or done.
*/
- virtual Response advance(InstrDTO &next_instr, Response p) = 0;
+ virtual InstrDTO *advance(Response p) = 0;
protected:
/**
diff --git a/inc/wb.h b/inc/wb.h
index 9a708a6..7c796ab 100644
--- a/inc/wb.h
+++ b/inc/wb.h
@@ -1,8 +1,8 @@
#ifndef WB_H
#define WB_H
+#include "instrDTO.h"
#include "response.h"
#include "stage.h"
-#include "instrDTO.h"
class WB : public Stage
{
@@ -14,7 +14,7 @@ class WB : public Stage
*/
WB(Stage *next);
- Response advance(InstrDTO &next_instr, Response p) override;
+ InstrDTO *advance(Response p) override;
};
#endif /* WB_H_INCLUDED */
diff --git a/src/sim/controller.cc b/src/sim/controller.cc
index 17937eb..622f1dc 100644
--- a/src/sim/controller.cc
+++ b/src/sim/controller.cc
@@ -16,10 +16,9 @@ Controller::Controller(Stage *stage, Storage *storage, bool is_pipelined)
void Controller::run_for(int number)
{
- InstrDTO instr;
int i;
for (i = 0; i < number; ++i) {
- this->advance(instr, OK);
+ this->advance(OK);
}
}
@@ -29,11 +28,11 @@ std::array<int, GPR_NUM> Controller::get_gprs() { return this->gprs; }
int Controller::get_pc() { return this->pc; }
-Response Controller::advance(InstrDTO &next_instr, Response p)
+InstrDTO *Controller::advance(Response p)
{
- Response r;
+ InstrDTO *r;
- r = this->next->advance(next_instr, p);
+ r = this->next->advance(p);
++this->clock_cycle;
return r;
}
diff --git a/src/sim/ex.cc b/src/sim/ex.cc
index 5b561f8..3a1e92c 100644
--- a/src/sim/ex.cc
+++ b/src/sim/ex.cc
@@ -6,4 +6,4 @@
EX::EX(Stage *stage) : Stage(stage) { this->id = EXEC; }
-Response EX::advance(InstrDTO &next_instr, Response p) { return OK; }
+InstrDTO *EX::advance(Response p) { return nullptr; }
diff --git a/src/sim/id.cc b/src/sim/id.cc
index da7b55c..969cb9d 100644
--- a/src/sim/id.cc
+++ b/src/sim/id.cc
@@ -8,22 +8,24 @@
ID::ID(Stage *stage) : Stage(stage) { this->id = DCDE; }
-Response ID::advance(InstrDTO &next_instr, Response p)
+InstrDTO *ID::advance(Response p)
{
+ InstrDTO *r = nullptr;
Response n;
this->advance_helper();
if (this->status == OK && p == OK) {
- // mutual consent
+ // mutual consent
this->curr_instr->set_time_of(this->id, this->clock_cycle);
- next_instr = *this->curr_instr;
+ r = new InstrDTO(*this->curr_instr);
+ delete curr_instr;
curr_instr = nullptr;
}
n = (p != OK || this->status != OK) ? BLOCKED : OK;
// the power of consent
- n = this->next->advance(*curr_instr, n);
- return this->status;
+ this->curr_instr = this->next->advance(n);
+ return r;
}
void ID::get_instr_fields(
diff --git a/src/sim/if.cc b/src/sim/if.cc
index 3d53ad3..43132ed 100644
--- a/src/sim/if.cc
+++ b/src/sim/if.cc
@@ -6,17 +6,21 @@
IF::IF(Stage *stage) : Stage(stage) { this->id = FETCH; }
-Response IF::advance(InstrDTO &next_instr, Response p)
+InstrDTO *IF::advance(Response p)
{
+ InstrDTO *r = nullptr;
+
this->advance_helper();
if (this->status == OK && p == OK) {
// mutual consent
++this->pc;
this->curr_instr->set_time_of(this->id, this->clock_cycle);
- next_instr = *this->curr_instr;
+ r = new InstrDTO(*this->curr_instr);
+ delete curr_instr;
curr_instr = nullptr;
}
- return this->status;
+
+ return r;
}
void IF::advance_helper()
diff --git a/src/sim/mm.cc b/src/sim/mm.cc
index f394420..5bc5836 100644
--- a/src/sim/mm.cc
+++ b/src/sim/mm.cc
@@ -6,7 +6,7 @@
MM::MM(Stage *stage) : Stage(stage) { this->id = MEM; }
-Response MM::advance(InstrDTO &next_instr, Response p)
+InstrDTO *MM::advance(Response p)
{
- return OK;
+ return nullptr;
}
diff --git a/src/sim/wb.cc b/src/sim/wb.cc
index bdea65a..7a8d64c 100644
--- a/src/sim/wb.cc
+++ b/src/sim/wb.cc
@@ -6,4 +6,4 @@
WB::WB(Stage *stage) : Stage(stage) { this->id = WRITE; }
-Response WB::advance(InstrDTO &next_instr, Response p) { return OK; }
+InstrDTO *WB::advance(Response p) { return nullptr; }
diff --git a/tests/if.cc b/tests/if.cc
index bb25afa..185a52a 100644
--- a/tests/if.cc
+++ b/tests/if.cc
@@ -30,35 +30,36 @@ class IFPipeFixture
/**
* Fetch a clean line not in cache.
*/
- void fetch_through(InstrDTO &instr)
+ InstrDTO *fetch_through()
{
+ InstrDTO *r;
int i;
- Response r;
for (i = 0; i < this->m_delay + 1; ++i) {
- r = this->ct->advance(instr, OK);
+ r = this->ct->advance(OK);
// check response
- CHECK(r == STALLED);
+ CHECK(r == nullptr);
}
- this->fetch_cache(instr);
+ return this->fetch_cache();
}
/**
* Fetch a line in cache.
*/
- void fetch_cache(InstrDTO &instr)
+ InstrDTO *fetch_cache()
{
+ InstrDTO *r;
int i;
- Response r;
for (i = 0; i < this->c_delay; ++i) {
- r = this->ct->advance(instr, OK);
+ r = this->ct->advance(OK);
// check response
- CHECK(r == STALLED);
+ CHECK(r == nullptr);
}
- r = this->ct->advance(instr, OK);
+ r = this->ct->advance(OK);
// check response
- CHECK(r == OK);
+ CHECK(r != nullptr);
+ return r;
}
int m_delay = 3;
@@ -71,60 +72,65 @@ class IFPipeFixture
TEST_CASE_METHOD(IFPipeFixture, "fetch returns single instuction", "[if_pipe]")
{
- InstrDTO instr;
+ InstrDTO *i;
int expected_cycles;
expected_cycles = this->m_delay + this->c_delay + 2;
- this->fetch_through(instr);
+ i = this->fetch_through();
+ CHECK(i->get_time_of(FETCH) == expected_cycles);
+ REQUIRE(i->get_instr_bits() == this->p[0]);
- CHECK(instr.get_time_of(FETCH) == expected_cycles);
- REQUIRE(instr.get_instr_bits() == this->p[0]);
+ delete i;
}
TEST_CASE_METHOD(IFPipeFixture, "fetch returns two instuctions", "[if_pipe]")
{
- InstrDTO instr;
+ InstrDTO *i;
int expected_cycles;
expected_cycles = this->m_delay + this->c_delay + 2;
- this->fetch_through(instr);
+ i = this->fetch_through();
- CHECK(instr.get_time_of(FETCH) == expected_cycles);
- REQUIRE(instr.get_instr_bits() == this->p[0]);
+ CHECK(i->get_time_of(FETCH) == expected_cycles);
+ REQUIRE(i->get_instr_bits() == this->p[0]);
+ delete i;
expected_cycles += this->c_delay + 1;
- this->fetch_cache(instr);
+ i = this->fetch_cache();
- CHECK(instr.get_time_of(FETCH) == expected_cycles);
- REQUIRE(instr.get_instr_bits() == this->p[1]);
+ CHECK(i->get_time_of(FETCH) == expected_cycles);
+ REQUIRE(i->get_instr_bits() == this->p[1]);
+ delete i;
}
-TEST_CASE_METHOD(IFPipeFixture, "fetch waits with old instruction", "[if_pipe]")
+TEST_CASE_METHOD(IFPipeFixture, "fetch waits with old instruction",
+"[if_pipe]")
{
- Response r;
- InstrDTO instr;
- int i, expected_cycles, fetch_cycles;
+ InstrDTO *i;
+ int j, expected_cycles, fetch_cycles;
fetch_cycles = this->m_delay + this->c_delay + 2;
expected_cycles = this->m_delay + (this->c_delay * 2) + 1;
- for (i = 0; i < this->m_delay + 1; ++i) {
- r = this->ct->advance(instr, BLOCKED);
+ for (j = 0; j < this->m_delay + 1; ++j) {
+ i = this->ct->advance(BLOCKED);
// check response
- CHECK(r == STALLED);
+ CHECK(i == nullptr);
}
- for (i = 0; i < this->c_delay; ++i) {
- r = this->ct->advance(instr, BLOCKED);
+ for (j = 0; j < this->c_delay; ++j) {
+ i = this->ct->advance(BLOCKED);
// check response
- CHECK(r == STALLED);
+ CHECK(i == nullptr);
}
- for (i = 0; i < expected_cycles - fetch_cycles; ++i) {
- r = this->ct->advance(instr, BLOCKED);
+ for (j = 0; j < expected_cycles - fetch_cycles; ++j) {
+ i = this->ct->advance(BLOCKED);
// check response
- CHECK(r == OK);
+ CHECK(i != nullptr);
}
- r = this->ct->advance(instr, OK);
- CHECK(instr.get_time_of(FETCH) == expected_cycles);
- REQUIRE(instr.get_instr_bits() == this->p[0]);
+ i = this->ct->advance(OK);
+ CHECK(i->get_time_of(FETCH) == expected_cycles);
+ REQUIRE(i->get_instr_bits() == this->p[0]);
+
+ delete i;
}