diff options
author | Siddarth-Suresh <65844402+Siddarth-Suresh@users.noreply.github.com> | 2025-04-26 23:57:02 -0400 |
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committer | Siddarth-Suresh <65844402+Siddarth-Suresh@users.noreply.github.com> | 2025-04-26 23:57:02 -0400 |
commit | bd4714ae53898337a02cfcec17628eeff9d77a9c (patch) | |
tree | 04e01e43dab9768c78134190b99a3c9fc4f837cf | |
parent | 41f612789f652654b5f2fa8c3fee4e348e2081b1 (diff) |
Fix for load and store vector
-rw-r--r-- | inc/ex.h | 5 | ||||
-rw-r--r-- | inc/instrDTO.h | 6 | ||||
-rw-r--r-- | inc/stage.h | 20 | ||||
-rw-r--r-- | src/id.cc | 12 |
4 files changed, 15 insertions, 28 deletions
@@ -76,11 +76,6 @@ class EX : public Stage * @param if the modulo operator should instead be used */ void handle_divide(signed int &s1, signed int s2, bool is_mod); - /** - * Maps each mnemonic to a function which carries out the instruction's base - * logic. - * All instructions store the result into s1. - */ }; #endif /* EX_H_INCLUDED */ diff --git a/inc/instrDTO.h b/inc/instrDTO.h index 8f8e28e..b99ba20 100644 --- a/inc/instrDTO.h +++ b/inc/instrDTO.h @@ -43,10 +43,14 @@ struct InstrDTO { */ signed int slot_A; /** - * Optional slot for holding PC + * Optional slot for holding PC / base address */ signed int slot_B; /** + * Optional slot to hold immediates + */ + signed int slot_C; + /** * The mnemonic of the instruction. */ Mnemonic mnemonic; diff --git a/inc/stage.h b/inc/stage.h index ae01723..dde103b 100644 --- a/inc/stage.h +++ b/inc/stage.h @@ -110,16 +110,6 @@ class Stage template <typename T> void store_register(signed int v, T d) { - // if (v < 0 || v >= GPR_NUM + V_NUM) { - // throw std::out_of_range( - // "instruction tried to access register which does not exist"); - // } - - // if (v >= GPR_NUM) - // this->vrs[v % GPR_NUM] = d; - // else - // this->gprs[v] = d; - if constexpr (std::is_same_v<T, signed int>) { if (v < 0 || v >= GPR_NUM) { throw std::out_of_range("Invalid GPR index for storing scalar"); @@ -141,16 +131,6 @@ class Stage template <typename T> T dereference_register(signed int v) { - // signed int r; - - // if (v < 0 || v >= GPR_NUM + V_NUM) { - // throw std::out_of_range( - // "instruction tried to access register which does not exist"); - // } - - // r = (v >= GPR_NUM) ? this->vrs[v % GPR_NUM] : this->gprs[v]; - // return r; - if constexpr (std::is_same_v<T, signed int>) { if (v < 0 || v >= GPR_NUM) { throw std::out_of_range("Invalid GPR index"); @@ -194,26 +194,33 @@ void ID::decode_I_type(signed int &s1) s0b = REG_SIZE; s1b = s0b + REG_SIZE; s2b = WORD_SPEC - LINE_SPEC - OPCODE_SIZE; + // s3 is immediate s3 = GET_BITS_SIGN_EXTEND(s1, s1b, s2b); switch (this->curr_instr->mnemonic) { case STORE: + this->curr_instr->operands.integer.slot_three = s3; s2 = GET_MID_BITS(s1, s0b, s1b); s1 = GET_LS_BITS(s1, s0b); // both operands are read values + // s1 is base address r1 = this->read_guard(s1); this->curr_instr->operands.integer.slot_one = s1; + // s2 is value to be stored r2 = this->read_guard(s2); this->curr_instr->operands.integer.slot_two = s2; this->status = (r1 == OK && r2 == OK) ? OK : STALLED; return; case STOREV: + this->curr_instr->slot_C = s3; s2 = GET_MID_BITS(s1, s0b, s1b); s1 = GET_LS_BITS(s1, s0b); - // both operands are read values - r1 = this->read_vec_guard(s1,this->curr_instr->operands.vector.slot_one); + // base address + r1 = this->read_guard(s1); + this->curr_instr->slot_B = s1; + // vector value to be stored r2 = this->read_vec_guard(s2,this->curr_instr->operands.vector.slot_two); r3 = this->set_vlen(); @@ -229,6 +236,7 @@ void ID::decode_I_type(signed int &s1) this->status = (r1 == OK && r3 == OK) ? OK : STALLED; return; case LOAD: + this->curr_instr->operands.integer.slot_three = s3; s2 = GET_LS_BITS(s1, s0b); s1 = GET_MID_BITS(s1, s0b, s1b); break; |