Merge pull request #79 from bdunahu/bdunahuHEADmaster

Replace LOADV, STOREV, with strided load (SRDL), strided store (SRDS), add vector rotate (ROTV)

5 files changed, 27 insertions, 10 deletions

diff --git a/inc/ex.h b/inc/ex.h
index ff4041b..64eecb7 100644
--- a/inc/ex.h
+++ b/inc/ex.h
@@ -78,7 +78,6 @@ class EX : public Stage
 	 * Handles operations involving three vector registers.
 	 * @param slot 1, and later, the result of the mnemonic operation.
 	 * @param slot 2
-	 * @param slot 3
 	 * @param the mnemonic
 	 * @param the vector length register
 	 */
@@ -89,14 +88,17 @@ class EX : public Stage
 		unsigned int v_len);
 
 	/**
-	 * Handles operations involving a single vector register.
-	 * Currently, this is LOADV and STOREV
+	 * Handles operations involving a vector result and a scalar.
 	 * @param slot 1, and later, the result of the mnemonic operation.
 	 * @param slot 2
 	 * @param the mnemonic
 	 * @param the vector length register
 	 */
-	void handle_i_vector_operations(signed int &s1, signed int s2, Mnemonic m);
+	void handle_s_vector_operations(
+		std::array<signed int, V_R_LIMIT> &s1,
+		signed int s2,
+		Mnemonic m,
+		unsigned int v_len);
 	/**
 	 * Wrapper for division functions, which detects HALT instructinos (division
 	 * by 0).
diff --git a/inc/instr.h b/inc/instr.h
index 0c49a79..5a8ff4a 100644
--- a/inc/instr.h
+++ b/inc/instr.h
@@ -37,8 +37,10 @@ enum Mnemonic {
 	DIVV,
 	CMP,
 	CEV,
+	SRDL,
+	SRDS,
+	ROTV,
 	LOAD,
-	LOADV,
 	ADDI,
 	SUBI,
 	SFTRI,
@@ -47,7 +49,6 @@ enum Mnemonic {
 	ORI,
 	XORI,
 	STORE,
-	STOREV,
 	JMP,
 	JRL,
 	JAL,
@@ -64,7 +65,7 @@ enum Mnemonic {
 enum FieldType {
 	SI_INT,
 	R_VECT,
-	I_VECT,
+	S_VECT,
 };
 
 namespace instr
diff --git a/inc/instrDTO.h b/inc/instrDTO.h
index ccc6ed9..5d6a4eb 100644
--- a/inc/instrDTO.h
+++ b/inc/instrDTO.h
@@ -35,7 +35,7 @@ struct V_TYPE {
 };
 
 struct VI_TYPE {
-	signed int slot_one;
+	std::array<signed int, V_R_LIMIT> slot_one;
 	signed int slot_two;
 	std::array<signed int, V_R_LIMIT> slot_three;
 };
@@ -68,7 +68,7 @@ struct InstrDTO {
 	union {
 		struct U_INT_TYPE integer;
 		struct V_TYPE vector;
-		struct VI_TYPE i_vector;
+		struct VI_TYPE s_vector;
 	} operands;
 };
 
diff --git a/inc/mm.h b/inc/mm.h
index 230b258..d54d6ad 100644
--- a/inc/mm.h
+++ b/inc/mm.h
@@ -29,6 +29,19 @@ class MM : public Stage
 
   private:
 	void advance_helper() override;
+	/**
+	 * Helpers for `advance_helper'. Sets the `this->status' to OK
+	 * If the current memory IO returned OK, and all vector elements
+	 * have been processed. Otherwise, sets `this->status' to STALLED
+	 * @param the response from the storage devices.
+	 */
+	void try_start();
+	void try_finish(int response);
+	/**
+	 * The index element currently being loaded or stored.
+	 * Used for strided load/store.
+	 */
+	int curr_element = 0;
 };
 
 #endif /* MM_H_INCLUDED */
diff --git a/inc/wb.h b/inc/wb.h
index 35c9240..bbba5bf 100644
--- a/inc/wb.h
+++ b/inc/wb.h
@@ -51,7 +51,8 @@ class WB : public Stage
 	 * @return the vector register to be stored, obtained by copying the
 	 * unfilled elements in the destination register to the source. This is
 	 * required to ensure what is written back only changes VECTOR_LENGTH number
-	 * of elements.
+	 * of elements. Correctly handles zeroing out ALU operations if the VECTOR
+	 * LENGTH number is zero.
 	 */
 	std::array<signed int, V_R_LIMIT> copy_extra_vector_elements();
 };