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| author | Siddarth Suresh <155843085+SiddarthSuresh98@users.noreply.github.com> | 2025-03-09 12:51:30 -0400 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-03-09 12:51:30 -0400 |
| commit | e4ad6c6694aa1fe9762714507c9ff3488ec21c90 (patch) | |
| tree | 9a7f7545d32fc488331143454603c07b9ccd732f /inc/cache.h | |
| parent | 0c6c9f8074aa5c356e2a1e582ab81355967a2060 (diff) | |
| parent | 035eba9d7a3b1c68b57bf954d0e3983d6e5f11e5 (diff) | |
Merge pull request #18 from bdunahu/dev-sid
Implement dram load
Diffstat (limited to 'inc/cache.h')
| -rw-r--r-- | inc/cache.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/inc/cache.h b/inc/cache.h index f1fb942..d470e6c 100644 --- a/inc/cache.h +++ b/inc/cache.h @@ -18,7 +18,7 @@ class Cache : public Storage ~Cache(); Response write(Accessor accessor, signed int data, int address) override; - Response read(Accessor accessor, int address) override; + Response read(Accessor accessor, int address, std::array<signed int, LINE_SIZE>& data) override; }; #endif /* CACHE_H_INCLUDED */ |