Merge pull request #19 from bdunahu/bdunahu

cache store, handle load requests to memory, write allocate policy
-- changes look good

4 files changed, 72 insertions, 15 deletions

diff --git a/inc/cache.h b/inc/cache.h
index d470e6c..e8b7030 100644
--- a/inc/cache.h
+++ b/inc/cache.h
@@ -1,6 +1,8 @@
 #ifndef CACHE_H
 #define CACHE_H
-#include <storage.h>
+#include "definitions.h"
+#include "storage.h"
+#include <array>
 
 class Cache : public Storage
 {
@@ -14,11 +16,30 @@ class Cache : public Storage
 	 * @param The number of clock cycles each access takes.
 	 * @return A new cache object.
 	 */
-	Cache(int lines, Storage *lower, int delay);
+	Cache(Storage *lower, int delay);
 	~Cache();
 
 	Response write(Accessor accessor, signed int data, int address) override;
-	Response read(Accessor accessor, int address, std::array<signed int, LINE_SIZE>& data) override;
+	Response read(
+		Accessor accessor,
+		int address,
+		std::array<signed int, LINE_SIZE> &data) override;
+
+  private:
+	/**
+	 * Fetches `address` from a lower level of storage if it is not already
+	 * present. If it is not, temporarily sets the is_blocked attribute of this
+	 * cache level to true, and the victim line is chosen/written back.
+	 * @param the address that must be present in cache.
+	 */
+	void fetch_resource(int address);
+	/**
+	 * An array of metadata about elements in `data`.
+	 * If the first value of an element is negative, the corresponding
+	 * element in `data` is invalid. If the most second value of an element
+	 * is nonzero, the corresponding element in `data` is dirty.
+	 */
+	std::array<std::array<int, 2>, L1_CACHE_SIZE> meta;
 };
 
 #endif /* CACHE_H_INCLUDED */
diff --git a/inc/definitions.h b/inc/definitions.h
index 4b01be9..877065e 100644
--- a/inc/definitions.h
+++ b/inc/definitions.h
@@ -2,25 +2,49 @@
 #define DEFINITIONS_H
 #include <cmath>
 
-/* The number of bits to specify a word in a line
+/**
+ * The number of bits to specify a word in a line
  */
 #define LINE_SPEC 2
+/**
+ * The total number of words in a line
+ */
 #define LINE_SIZE (int)pow(2, 2)
 
-/* The number of bits to specify a memory line
- * (/ (expt 2 15) 4)
+/**
+ * The number of bits to specify a memory line
+ * calculated as: (/ (expt 2 15) 4)
  */
 #define MEM_SPEC 13
+/**
+ * The total number of words in memory
+ */
 #define MEM_SIZE (int)pow(2, MEM_SPEC)
 
-/* The number of bits to specify a l1 cache line
+/**
+ * The number of bits to specify a l1 cache line
  */
 #define L1_CACHE_SPEC 5
+/**
+ * The total number of words in l1 cache
+ */
 #define L1_CACHE_SIZE (int)pow(2, L1_CACHE_SPEC)
 
-/* Parses some bits.
+/**
+ * Return the N least-significant bits from integer K using a bit mask
+ * @param the integer to be parsed
+ * @param the number of bits to be parsed
+ * @return the N least-significant bits from K
+ */
+#define GET_LS_BITS(k, n) ((k) & ((1 << (n)) - 1))
+/**
+ * Return the bits from integer K starting at N and ending at M using a bit
+ * mask
+ * @param the integer to be parsed
+ * @param the index of the starting bit to be parsed
+ * @param the index of the ending bit to be parsed
+ * @return a section of bits from K
  */
-#define LAST(k, n) ((k) & ((1 << (n)) - 1))
-#define MID(k, m, n) LAST((k) >> (m), ((n) - (m)))
+#define GET_MID_BITS(k, m, n) GET_LS_BITS((k) >> (m), ((n) - (m)))
 
 #endif /* DEFINITIONS_H_INCLUDED */
diff --git a/inc/dram.h b/inc/dram.h
index 1061d6b..20221b7 100644
--- a/inc/dram.h
+++ b/inc/dram.h
@@ -19,7 +19,15 @@ class Dram : public Storage
 	Response read(Accessor accessor, int address, std::array<signed int, LINE_SIZE>& data) override;
 
 	private:
+	/**
+	 * Helper for `write`.
+	 */
+	void do_write(signed int, int);
+	/**
+	 * Helper for `read`.
+	 */
 	void do_read(std::array<signed int, LINE_SIZE>& data_line, int address);
 };
 
 #endif /* DRAM_H_INCLUDED */
+
diff --git a/inc/storage.h b/inc/storage.h
index 1fb41b0..793b982 100644
--- a/inc/storage.h
+++ b/inc/storage.h
@@ -32,7 +32,10 @@ class Storage
 	 * @return a status code reflecting the state of the request, and the
 	 * data being returned.
 	 */
-	virtual Response read(Accessor accessor, int address, std::array<signed int, LINE_SIZE>& data) = 0;
+	virtual Response read(
+		Accessor accessor,
+		int address,
+		std::array<signed int, LINE_SIZE> &data) = 0;
 	/**
 	 * Sidedoor view of `lines` of memory starting at `base`.
 	 * @param The base line to start getting memory from.
@@ -48,10 +51,6 @@ class Storage
 
   protected:
 	/**
-	 * Helper for `write`.
-	 */
-	void do_write(signed int, int);
-	/**
 	 * The data currently stored in this level of storage.
 	 */
 	std::vector<std::array<signed int, LINE_SIZE>> *data;
@@ -73,6 +72,11 @@ class Storage
 	 * The number of cycles until the current request is completed.
 	 */
 	int wait_time;
+	/**
+	 * A flag indicating whether this level of storage is currently waiting for
+	 * a lower level.
+	 */
+	int is_waiting;
 };
 
 #endif /* STORAGE_H_INCLUDED */