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authorSiddarth-Suresh <65844402+Siddarth-Suresh@users.noreply.github.com>2025-03-31 13:45:56 -0400
committerSiddarth-Suresh <65844402+Siddarth-Suresh@users.noreply.github.com>2025-03-31 13:45:56 -0400
commit598da346f59503442ba0b4badfd9ac8b58af4a89 (patch)
tree6f850061b9e89a93c30c8a6d7a699ffdc291e2ab /src/sim/controller.cc
parent44cb9d396b909c84ef7ad3338e0a12cfcc082748 (diff)
MEM WB stage
Diffstat (limited to 'src/sim/controller.cc')
-rw-r--r--src/sim/controller.cc5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/sim/controller.cc b/src/sim/controller.cc
index 06591af..89ff4e7 100644
--- a/src/sim/controller.cc
+++ b/src/sim/controller.cc
@@ -31,10 +31,11 @@ int Controller::get_pc() { return this->pc; }
InstrDTO *Controller::advance(Response p)
{
InstrDTO *r;
-
r = this->next->advance(p);
++this->clock_cycle;
return r;
}
-void Controller::advance_helper() {}
+void Controller::advance_helper() {
+ // TODO: check halt condition and call UI to refresh
+}