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authorSiddarth Suresh <155843085+SiddarthSuresh98@users.noreply.github.com>2025-04-27 09:12:50 -0400
committerGitHub <noreply@github.com>2025-04-27 09:12:50 -0400
commit5653b2a033e7a4173d2f178b5ce52384666d3d7b (patch)
tree5c8fc7282ad1ce0c215786a70b35296645df2a1b /src/sim/instr.cc
parent3d0133c2f793e82d7519d8e2c5023114cd0f0eab (diff)
parenta4dd1f00a5d0108058fb3bfbd5f399a507792859 (diff)
Merge pull request #68 from bdunahu/bdunahu
[WIP] Pipeline cleanup and revisited GUI storage display
Diffstat (limited to 'src/sim/instr.cc')
-rw-r--r--src/sim/instr.cc40
1 files changed, 0 insertions, 40 deletions
diff --git a/src/sim/instr.cc b/src/sim/instr.cc
deleted file mode 100644
index 9bd951b..0000000
--- a/src/sim/instr.cc
+++ /dev/null
@@ -1,40 +0,0 @@
-// Simulator for the RISC-V[ECTOR] mini-ISA
-// Copyright (C) 2025 Siddarth Suresh
-// Copyright (C) 2025 bdunahu
-
-// This program is free software: you can redistribute it and/or modify
-// it under the terms of the GNU General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-
-// This program is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-// GNU General Public License for more details.
-
-// You should have received a copy of the GNU General Public License
-// along with this program. If not, see <https://www.gnu.org/licenses/>.
-
-#include "instr.h"
-#include <functional>
-#include <map>
-#include <unordered_map>
-
-namespace instr
-{
-const std::unordered_map<unsigned int, Mnemonic> mnemonic_map = {
- {0b0000100, ADD}, {0b0001000, SUB}, {0b0001100, MUL},
- {0b0010000, QUOT}, {0b0010100, REM}, {0b0011000, SFTR},
- {0b0011100, SFTL}, {0b0100000, AND}, {0b0100100, OR},
- {0b0101000, NOT}, {0b0101100, XOR}, {0b0110000, ADDV},
- {0b0110100, SUBV}, {0b0111000, MULV}, {0b0111100, DIVV},
- {0b1000000, CMP}, {0b1000100, CEV}, {0b000101, LOAD},
- {0b001001, LOADV}, {0b0001101, ADDI}, {0b0010001, SUBI},
- {0b0010101, SFTRI}, {0b0011001, SFTLI}, {0b0011101, ANDI},
- {0b0100001, ORI}, {0b0100101, XORI}, {0b0101001, STORE},
- {0b0101101, STOREV}, {0b0000110, JMP}, {0b0001010, JRL},
- {0b0001110, JAL}, {0b0010010, BEQ}, {0b0010110, BGT},
- {0b0011010, BUF}, {0b0011110, BOF}, {0b0100010, PUSH},
- {0b0100110, POP}, {0b0101010, RET},
-};
-} // namespace instr