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authorbd <bdunaisky@umass.edu>2025-04-01 02:12:15 +0000
committerGitHub <noreply@github.com>2025-04-01 02:12:15 +0000
commit6f536bd1bd1abab307c79d688c993e930cf7c250 (patch)
tree6132673f5aa85f2488d6f7de77fb33538b7320d3 /src/sim/mm.cc
parent44cb9d396b909c84ef7ad3338e0a12cfcc082748 (diff)
parent574212dafcf1c4bdb7d5e6aaa577b74345988d67 (diff)
Merge pull request #45 from bdunahu/dev-sid
MEM WB stage
Diffstat (limited to 'src/sim/mm.cc')
-rw-r--r--src/sim/mm.cc22
1 files changed, 21 insertions, 1 deletions
diff --git a/src/sim/mm.cc b/src/sim/mm.cc
index 2b73207..cd85056 100644
--- a/src/sim/mm.cc
+++ b/src/sim/mm.cc
@@ -6,4 +6,24 @@
MM::MM(Stage *stage) : Stage(stage) { this->id = MEM; }
-void MM::advance_helper() {}
+void MM::advance_helper() {
+ Response r;
+ signed int data;
+ if(this->curr_instr){
+ if (this->curr_instr->get_mnemonic() == LOAD) {
+ r = this->storage->read_word(this->id, this->curr_instr->get_s1(), data);
+ if(r == OK){
+ this->status = OK;
+ this->curr_instr->set_s2(data);
+ }
+ } else if (this->curr_instr->get_mnemonic() == STORE) {
+ r = this->storage->write_word(this->id, this->curr_instr->get_s2(), this->curr_instr->get_s1());
+ if(r == OK){
+ this->status = OK;
+ }
+ } else {
+ // Mem has no work so just forward the instruction to WB
+ this->status = OK;
+ }
+ }
+}