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authorSiddarth Suresh <155843085+SiddarthSuresh98@users.noreply.github.com>2025-05-11 23:39:06 -0400
committerGitHub <noreply@github.com>2025-05-11 23:39:06 -0400
commitf02bea04284d33a2d014f636baa6a861b73f6c41 (patch)
treece89a55af60b01f6b4129d7539d07c08bfaa1b9a /tests
parenta35eb451889f0efa99ff7fe1c0a3a76afd5e7ad5 (diff)
parent43588597069587f6846a7d64a1957435bec5429d (diff)
Merge pull request #79 from bdunahu/bdunahuHEADmaster
Replace LOADV, STOREV, with strided load (SRDL), strided store (SRDS), add vector rotate (ROTV)
Diffstat (limited to 'tests')
-rw-r--r--tests/ex.cc4
-rw-r--r--tests/id.cc4
2 files changed, 4 insertions, 4 deletions
diff --git a/tests/ex.cc b/tests/ex.cc
index 5972182..5dbbe32 100644
--- a/tests/ex.cc
+++ b/tests/ex.cc
@@ -538,7 +538,7 @@ TEST_CASE_METHOD(EXFixture, "LOAD", "[ex]")
delete i;
}
-// TEST_CASE_METHOD(EXFixture, "LOADV", "[ex]")
+// TEST_CASE_METHOD(EXFixture, "SRDL", "[ex]")
// {
// }
@@ -763,7 +763,7 @@ TEST_CASE_METHOD(EXFixture, "STORE", "[ex]")
delete i;
}
-// TEST_CASE_METHOD(EXFixture, "STOREV", "[ex]")
+// TEST_CASE_METHOD(EXFixture, "SRDS", "[ex]")
// {
// }
diff --git a/tests/id.cc b/tests/id.cc
index b52ad9c..20b3200 100644
--- a/tests/id.cc
+++ b/tests/id.cc
@@ -166,13 +166,13 @@ TEST_CASE_METHOD(IDFixture, "Parse arbitrary i-type # two", "[id]")
signed int t;
InstrDTO *i;
- t = this->encode_I_type(0xCC, 0b10101, 0b00110, 0b11011, 0b1);
+ t = this->encode_I_type(0xCC, 0b10101, 0b00110, 0b11010, 0b1);
i = this->decode_bits(t);
CHECK(i->operands.integer.slot_one == 0x00000000); // registers are empty
CHECK(i->operands.integer.slot_two == 0x00000000);
CHECK(i->operands.integer.slot_three == 0xCC);
- CHECK(i->mnemonic == STOREV);
+ CHECK(i->mnemonic == STORE);
delete i;
}