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-rw-r--r--inc/instr.h1
-rw-r--r--src/id.cc31
-rw-r--r--src/instr.cc5
-rw-r--r--src/wb.cc10
4 files changed, 9 insertions, 38 deletions
diff --git a/inc/instr.h b/inc/instr.h
index 7a6396d..caceb39 100644
--- a/inc/instr.h
+++ b/inc/instr.h
@@ -64,7 +64,6 @@ enum Mnemonic {
enum FieldType {
SI_INT,
R_VECT,
- I_VECT,
};
namespace instr
diff --git a/src/id.cc b/src/id.cc
index 371e3b7..3c974e9 100644
--- a/src/id.cc
+++ b/src/id.cc
@@ -123,6 +123,8 @@ void ID::decode_R_type(signed int &s1)
case SUBV:
case MULV:
case DIVV:
+ case SRDL:
+ case SRDS:
if (this->status == OK) {
this->curr_instr->operands.vector.slot_three =
this->write_guard<std::array<signed int, V_R_LIMIT>>(s3);
@@ -164,35 +166,6 @@ void ID::decode_I_type(signed int &s1)
this->curr_instr->operands.integer.slot_two = s2;
this->status = (r1 == OK && r2 == OK) ? OK : STALLED;
return;
- // case SRDS:
- // this->curr_instr->operands.i_vector.slot_two = s3;
- // s2 = GET_MID_BITS(s1, s0b, s1b);
- // s1 = GET_LS_BITS(s1, s0b);
-
- // // base address
- // r1 = this->read_guard<signed int>(s1, s1);
- // this->curr_instr->operands.i_vector.slot_one = s1;
- // // vector value to be stored
- // r2 = this->read_guard<std::array<signed int, V_R_LIMIT>>(
- // s2, this->curr_instr->operands.i_vector.slot_three);
- // r3 = this->set_vlen();
-
- // this->status = (r1 == OK && r2 == OK && r3 == OK) ? OK : STALLED;
- // return;
- // case SRDL:
- // this->curr_instr->operands.i_vector.slot_two = s3;
- // s2 = GET_LS_BITS(s1, s0b);
- // s1 = GET_MID_BITS(s1, s0b, s1b);
- // // base address
- // r1 = this->read_guard<signed int>(s1, s1);
- // this->curr_instr->operands.i_vector.slot_one = s1;
- // r3 = this->set_vlen();
- // if (r1 == OK && r3 == OK)
- // // vector destination
- // this->curr_instr->operands.i_vector.slot_three =
- // this->write_guard<std::array<signed int, V_R_LIMIT>>(s2);
- // this->status = (r1 == OK && r3 == OK) ? OK : STALLED;
- // return;
case LOAD:
this->curr_instr->operands.integer.slot_three = s3;
s2 = GET_LS_BITS(s1, s0b);
diff --git a/src/instr.cc b/src/instr.cc
index 98028fc..1282147 100644
--- a/src/instr.cc
+++ b/src/instr.cc
@@ -40,10 +40,9 @@ const std::unordered_map<unsigned int, Mnemonic> mnemonic_map = {
FieldType get_field_types(Mnemonic m)
{
- if (m == ADDV || m == SUBV || m == MULV || m == DIVV || m == CEV) {
+ if (m == ADDV || m == SUBV || m == MULV || m == DIVV || m == CEV ||
+ m == SRDL || m == SRDS) {
return R_VECT;
- } else if (m == SRDL || m == SRDS) {
- return I_VECT;
} else {
return SI_INT;
}
diff --git a/src/wb.cc b/src/wb.cc
index bfdbc3a..1f396a5 100644
--- a/src/wb.cc
+++ b/src/wb.cc
@@ -62,11 +62,11 @@ void WB::write_handler()
this->store_register<std::array<signed int, V_R_LIMIT>>(
reg, this->copy_extra_vector_elements());
break;
- case I_VECT:
- this->store_register<std::array<signed int, V_R_LIMIT>>(
- reg, this->curr_instr->operands.i_vector.slot_three);
- // todo, use copy_extra_vector_elements
- break;
+ // case I_VECT:
+ // this->store_register<std::array<signed int, V_R_LIMIT>>(
+ // reg, this->curr_instr->operands.i_vector.slot_three);
+ // // todo, use copy_extra_vector_elements
+ // break;
}
}