diff options
| -rw-r--r-- | src/sim/controller.cc | 2 | ||||
| -rw-r--r-- | tests/controller.cc | 2 | ||||
| -rw-r--r-- | tests/if.cc | 4 |
3 files changed, 4 insertions, 4 deletions
diff --git a/src/sim/controller.cc b/src/sim/controller.cc index 2813905..6d46dc4 100644 --- a/src/sim/controller.cc +++ b/src/sim/controller.cc @@ -5,7 +5,7 @@ Controller::Controller(Stage *stage, Storage *storage, bool is_pipelined) : Stage(stage) { - this->clock_cycle = 0; + this->clock_cycle = 1; this->storage = storage; this->is_pipelined = is_pipelined; this->pc = 0x0; diff --git a/tests/controller.cc b/tests/controller.cc index a2f8e7d..e3b9f3c 100644 --- a/tests/controller.cc +++ b/tests/controller.cc @@ -43,7 +43,7 @@ TEST_CASE_METHOD( gprs = this->ct->get_gprs(); - CHECK(this->ct->get_clock_cycle() == 0); + CHECK(this->ct->get_clock_cycle() == 1); CHECK(std::all_of( gprs.begin(), gprs.end(), [](int value) { return value == 0; })); // change me later diff --git a/tests/if.cc b/tests/if.cc index 86458d2..5c1b645 100644 --- a/tests/if.cc +++ b/tests/if.cc @@ -74,7 +74,7 @@ TEST_CASE_METHOD(IFPipeFixture, "fetch returns single instuction", "[if_pipe]") InstrDTO instr; int expected_cycles; - expected_cycles = this->m_delay + this->c_delay + 1; + expected_cycles = this->m_delay + this->c_delay + 2; this->fetch_through(instr); CHECK(instr.get_if_cycle() == expected_cycles); @@ -86,7 +86,7 @@ TEST_CASE_METHOD(IFPipeFixture, "fetch returns two instuctions", "[if_pipe]") InstrDTO instr; int expected_cycles; - expected_cycles = this->m_delay + this->c_delay + 1; + expected_cycles = this->m_delay + this->c_delay + 2; this->fetch_through(instr); CHECK(instr.get_if_cycle() == expected_cycles); |