stage.cc « sim « src - RISC-VECTOR.git - A simulator for the custom RISC-V[ECTOR] ISA written in C++

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path: root/src/sim/stage.cc

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#include "stage.h"

Stage::Stage(Stage *next) {
	this->next = next;
}

std::array<int, GPR_NUM> Stage::gprs;
int Stage::pc;
Storage *Stage::storage;