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| author | Siddarth Suresh <155843085+SiddarthSuresh98@users.noreply.github.com> | 2025-04-08 10:17:09 -0400 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-04-08 10:17:09 -0400 |
| commit | cc1e5892a25949b996d69a0b07f151a276ef2570 (patch) | |
| tree | 643d37db692c19d1ef64223eadcac7a28dbbd7db /rva.asd | |
| parent | 19d13c8339ee990fba358417a54aa6f1c94c7bca (diff) | |
| parent | b85c10ba1c53f1b442fea6bde4c2a2f73cfe5d6b (diff) | |
Merge pull request #1 from bdunahu/bdunahu
Add logic to open file, full lexer and tests.
Diffstat (limited to 'rva.asd')
| -rw-r--r-- | rva.asd | 11 |
1 files changed, 8 insertions, 3 deletions
@@ -4,16 +4,19 @@ (asdf:defsystem #:rva ;; :author "" ;; :license "" - :version "0.1" + :version "0.3" :homepage "https://github.com/bdunahu/rva" :description "Assembler for the RISC-V[ECTOR] mini-ISA." :source-control (:git "git@github.com:bdunahu/rva.git") :depends-on (:uiop - :clingon) + :clingon + :trivia) :components ((:module "src" :serial t :components ((:file "package") (:file "util") + (:file "lex") + (:file "parse") (:file "main")))) :long-description #.(uiop:read-file-string @@ -33,7 +36,9 @@ :serial t :components ((:file "package") (:file "main") - (:file "util")))) + (:file "util") + (:file "lex") + (:file "parse")))) :perform (test-op (o s) (uiop:symbol-call :rva-tests :test-rva))) (defmethod asdf:perform ((o asdf:image-op) (c asdf:system)) |