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authorSiddarth Suresh <155843085+SiddarthSuresh98@users.noreply.github.com>2025-03-21 14:21:06 -0400
committerGitHub <noreply@github.com>2025-03-21 14:21:06 -0400
commitb2dbd9fa44f57bfa7b67f828ed8b354f4af3a0b6 (patch)
treeffd8e0bd2b112180251804a096f601f745f9af1b
parent1b01b557e76f8643964e5c367c072ab7778036f6 (diff)
parent5845ad71d78d310322046906ee4c8e91d007d57e (diff)
Merge pull request #27 from bdunahu/bdunahu
Make memory simulator an optional command, switch to test fixtures Changes look good
-rw-r--r--inc/dram.h2
-rw-r--r--src/cli/cli.cc2
-rw-r--r--src/main.cc43
-rw-r--r--src/storage/dram.cc4
-rw-r--r--tests/cache.cc12
-rw-r--r--tests/dram.cc773
6 files changed, 246 insertions, 590 deletions
diff --git a/inc/dram.h b/inc/dram.h
index 2771c3e..c7f927a 100644
--- a/inc/dram.h
+++ b/inc/dram.h
@@ -14,7 +14,7 @@ class Dram : public Storage
* @param The number of clock cycles each access takes.
* @return A new memory object.
*/
- Dram(int lines, int delay);
+ Dram(int delay);
~Dram();
Response
diff --git a/src/cli/cli.cc b/src/cli/cli.cc
index 41ac57c..e25b316 100644
--- a/src/cli/cli.cc
+++ b/src/cli/cli.cc
@@ -211,7 +211,7 @@ void Cli::initialize()
if (this->cache != nullptr)
delete this->cache;
- Dram *d = new Dram(MEM_LINES, MEM_DELAY);
+ Dram *d = new Dram(MEM_DELAY);
this->cache = new Cache(d, L1_CACHE_DELAY);
this->cycle = 1;
}
diff --git a/src/main.cc b/src/main.cc
index 08b38e6..f5eecac 100644
--- a/src/main.cc
+++ b/src/main.cc
@@ -1,6 +1,6 @@
#include "cli.h"
-#include "logger.h"
#include "definitions.h"
+#include "logger.h"
#include <getopt.h>
#include <iostream>
@@ -22,36 +22,39 @@ static std::string banner =
" _/ _/ _/ _/ _/ _/ _/ _/ _/ _/ _/ \n"
" _/ _/ _/_/_/_/ _/_/_/ _/ _/_/ _/ _/ _/ \n"
" _/_/ _/_/ ";
-static void print_version_number() { std::cout << banner << version_number << '\n'; }
+static void print_version_number()
+{
+ std::cout << banner << version_number << '\n';
+}
static void err()
{
std::cerr << "Usage:\n\trisc_vector [OPTIONS]\nOptions:\n\t--debug,\t-d: "
- "turn on verbose output\n\t--no-python,\t-p: run without "
- "GUI\n\t--version,\t-v: print the version information and exit\n"
+ "turn on verbose output\n\t--memory-only,\t-m: run the memory "
+ "simulator only, without a GUI.\n\t--version,\t-v: print the "
+ "version information and exit\n"
<< std::endl;
}
-static void parseArguments(int argc, char **argv, bool &python)
+static void
+parseArguments(int argc, char **argv, bool &memory_only)
{
struct option long_options[] = {
{"debug", no_argument, 0, 'd'},
- {"no-python", no_argument, 0, 'p'},
+ {"memory-only", no_argument, 0, 'm'},
{0, 0, 0, 0}};
- python = true;
-
int opt;
- while ((opt = getopt_long(argc, argv, "d:p", long_options, NULL)) != -1) {
+ while ((opt = getopt_long(argc, argv, "d:m", long_options, NULL)) != -1) {
switch (opt) {
case 'd':
global_log->setLevel(DEBUG);
global_log->log(DEBUG, "DEBUG output enabled.");
break;
- case 'p':
- global_log->log(INFO, "Python will NOT be started!");
- python = false;
+ case 'm':
+ global_log->log(INFO, "Starting the storage CLI interface...");
+ memory_only = true;
break;
default:
err();
@@ -63,20 +66,18 @@ static void parseArguments(int argc, char **argv, bool &python)
int main(int argc, char **argv)
{
print_version_number();
- Cli cli;
global_log->log(INFO, "Initializing...");
- bool python = true;
- parseArguments(argc, argv, python);
+ bool memory_only = false;
+ parseArguments(argc, argv, memory_only);
- if (python) {
- // fork off python here
- ;
- global_log->log(INFO, "Python started.");
+ if (memory_only) {
+ Cli cli;
+ cli.run();
}
- cli.run();
-
+ // fork off python here
+ global_log->log(INFO, "Python started.");
global_log->log(INFO, "Cleaning up...");
global_log->log(INFO, "Goodbye!");
return EXIT_SUCCESS;
diff --git a/src/storage/dram.cc b/src/storage/dram.cc
index 56eec47..20db47e 100644
--- a/src/storage/dram.cc
+++ b/src/storage/dram.cc
@@ -8,10 +8,10 @@
#include <iterator>
#include <utils.h>
-Dram::Dram(int lines, int delay)
+Dram::Dram(int delay)
{
this->data = new std::vector<std::array<signed int, LINE_SIZE>>;
- this->data->resize(lines);
+ this->data->resize(MEM_LINES);
this->delay = delay;
this->is_waiting = false;
this->lower = nullptr;
diff --git a/tests/cache.cc b/tests/cache.cc
index daaec90..1fc5209 100644
--- a/tests/cache.cc
+++ b/tests/cache.cc
@@ -15,7 +15,7 @@ TEST_CASE("Constructor singleton cache", "[cache]")
TEST_CASE("no delay stores instantly", "[cache]")
{
int delay = 0;
- Dram *d = new Dram(MEM_LINES, delay);
+ Dram *d = new Dram(delay);
Cache *c = new Cache(d, delay);
std::array<signed int, LINE_SIZE> expected = {0, 0, 0, 0};
std::array<signed int, LINE_SIZE> actual = d->view(0, 1)[0];
@@ -43,7 +43,7 @@ TEST_CASE("no delay stores instantly", "[cache]")
TEST_CASE("cache takes \"forever\"", "[cache]")
{
int delay = 0;
- Dram *d = new Dram(MEM_LINES, delay);
+ Dram *d = new Dram(delay);
Cache *c = new Cache(d, delay + 2);
std::array<signed int, LINE_SIZE> expected = {0, 0, 0, 0};
std::array<signed int, LINE_SIZE> actual = d->view(0, 1)[0];
@@ -79,7 +79,7 @@ TEST_CASE("cache takes \"forever\"", "[cache]")
TEST_CASE("dram takes \"forever\"", "[cache]")
{
int delay = 0;
- Dram *d = new Dram(MEM_LINES, delay + 2);
+ Dram *d = new Dram(delay + 2);
Cache *c = new Cache(d, delay);
std::array<signed int, LINE_SIZE> expected = {0, 0, 0, 0};
std::array<signed int, LINE_SIZE> actual = d->view(0, 1)[0];
@@ -115,7 +115,7 @@ TEST_CASE("dram takes \"forever\"", "[cache]")
TEST_CASE("dram and cache take \"forever\"", "[cache]")
{
int delay = 2;
- Dram *d = new Dram(MEM_LINES, delay + 2);
+ Dram *d = new Dram(delay + 2);
Cache *c = new Cache(d, delay);
std::array<signed int, LINE_SIZE> expected = {0, 0, 0, 0};
std::array<signed int, LINE_SIZE> actual = d->view(0, 1)[0];
@@ -162,7 +162,7 @@ TEST_CASE(
"dram takes \"forever\", two concurrent requests same index", "[cache]")
{
int delay = 0;
- Dram *d = new Dram(MEM_LINES, delay + 2);
+ Dram *d = new Dram(delay + 2);
Cache *c = new Cache(d, delay);
std::array<signed int, LINE_SIZE> expected = {0, 0, 0, 0};
std::array<signed int, LINE_SIZE> actual = d->view(0, 1)[0];
@@ -217,7 +217,7 @@ TEST_CASE(
"[cache]")
{
int delay = 0;
- Dram *d = new Dram(MEM_LINES, delay + 2);
+ Dram *d = new Dram(delay + 2);
Cache *c = new Cache(d, delay);
std::array<signed int, LINE_SIZE> expected = {0, 0, 0, 0};
std::array<signed int, LINE_SIZE> actual = d->view(0, 1)[0];
diff --git a/tests/dram.cc b/tests/dram.cc
index 72a6d14..4dcdb31 100644
--- a/tests/dram.cc
+++ b/tests/dram.cc
@@ -3,776 +3,431 @@
#include <array>
#include <catch2/catch_test_macros.hpp>
-TEST_CASE("Construct singleton dram", "[dram]")
+class DramFixture
{
- Dram *d = new Dram(1, 1);
- std::array<signed int, LINE_SIZE> expected = {0, 0, 0, 0};
- std::array<signed int, LINE_SIZE> actual = d->view(0, 1)[0];
- REQUIRE(expected == actual);
- delete d;
-}
-
-TEST_CASE(
- "Construct singleton dram, store 0th element in zero cycles", "[dram]")
-{
- Dram *d = new Dram(1, 0);
- std::array<signed int, LINE_SIZE> expected = {0, 0, 0, 0};
- std::array<signed int, LINE_SIZE> actual = d->view(0, 1)[0];
- CHECK(expected == actual);
-
- signed int w = 0x11223344;
-
- Response r = d->write_word(MEM, w, 0x00000000);
- CHECK(r == OK);
-
- expected.at(0) = w;
- actual = d->view(0, 1)[0];
- REQUIRE(expected == actual);
-
- delete d;
-}
-
-TEST_CASE(
- "Construct singleton dram, store 0th element in three cycles", "[dram]")
+ public:
+ DramFixture()
+ {
+ this->delay = 3;
+ this->d = new Dram(this->delay);
+ this->expected = {0, 0, 0, 0};
+ this->actual = this->d->view(0, 1)[0];
+ }
+ ~DramFixture() { delete this->d; }
+ int delay;
+ Dram *d;
+ std::array<signed int, LINE_SIZE> expected;
+ std::array<signed int, LINE_SIZE> actual;
+};
+
+TEST_CASE_METHOD(DramFixture, "store 0th element in DELAY cycles", "[dram]")
{
- int delay = 3;
- Dram *d = new Dram(1, delay);
- std::array<signed int, LINE_SIZE> expected = {0, 0, 0, 0};
- std::array<signed int, LINE_SIZE> actual = d->view(0, 1)[0];
+ Response r;
+ signed int w;
+ int i;
CHECK(expected == actual);
- signed int w = 0x11223344;
+ w = 0x11223344;
+ for (i = 0; i < this->delay; ++i) {
+ r = this->d->write_word(MEM, w, 0x0);
+ this->d->resolve();
- int i;
- Response r;
- for (i = 0; i < delay; ++i) {
- r = d->write_word(MEM, w, 0x00000000);
+ // check response
CHECK(r == WAIT);
-
+ // check for early modifications
actual = d->view(0, 1)[0];
REQUIRE(expected == actual);
- d->resolve();
}
- r = d->write_word(MEM, w, 0x00000000);
- CHECK(r == OK);
- d->resolve();
+ r = this->d->write_word(MEM, w, 0x0);
+ this->d->resolve();
+ CHECK(r == OK);
expected.at(0) = w;
- actual = d->view(0, 1)[0];
+ actual = this->d->view(0, 1)[0];
REQUIRE(expected == actual);
-
- delete d;
}
-TEST_CASE(
- "Construct singleton dram, store 0, 1th element in three cycles no "
- "conflict",
+TEST_CASE_METHOD(
+ DramFixture,
+ "store 0th, 1st element in DELAY cycles, no conflict",
"[dram]")
{
- int delay = 3;
- Dram *d = new Dram(1, delay);
- std::array<signed int, LINE_SIZE> expected = {0, 0, 0, 0};
- std::array<signed int, LINE_SIZE> actual = d->view(0, 1)[0];
+ Response r;
+ signed int w;
+ int i;
CHECK(expected == actual);
- signed int w = 0x11223344;
+ w = 0x11223344;
+ for (i = 0; i < this->delay; ++i) {
+ r = this->d->write_word(MEM, w, 0x0);
+ this->d->resolve();
- int i;
- Response r;
- for (i = 0; i < delay; ++i) {
- r = d->write_word(MEM, w, 0x00000000);
+ // check response
CHECK(r == WAIT);
-
+ // check for early modifications
actual = d->view(0, 1)[0];
REQUIRE(expected == actual);
- d->resolve();
}
- r = d->write_word(MEM, w, 0x00000000);
+ r = d->write_word(MEM, w, 0x0);
REQUIRE(r == OK);
// clock cycle did NOT resolve yet!
// this fetch should not make progress
- r = d->write_word(FETCH, w, 0x00000001);
- CHECK(r == WAIT);
-
- actual = d->view(0, 1)[0];
+ r = d->write_word(FETCH, w, 0x1);
CHECK(r == WAIT);
- d->resolve();
+ this->d->resolve();
expected.at(0) = w;
actual = d->view(0, 1)[0];
REQUIRE(expected == actual);
- for (i = 0; i < delay; ++i) {
- r = d->write_word(FETCH, w, 0x00000001);
- CHECK(r == WAIT);
+ for (i = 0; i < this->delay; ++i) {
+ r = this->d->write_word(FETCH, w, 0x1);
+ this->d->resolve();
+ // check response
+ CHECK(r == WAIT);
+ // check for early modifications
actual = d->view(0, 1)[0];
REQUIRE(expected == actual);
- d->resolve();
}
- r = d->write_word(FETCH, w, 0x00000001);
- actual = d->view(0, 1)[0];
+ r = d->write_word(FETCH, w, 0x1);
CHECK(r == OK);
+ this->d->resolve();
- expected.at(1) = w;
actual = d->view(0, 1)[0];
+ expected.at(1) = w;
REQUIRE(expected == actual);
-
- delete d;
}
-TEST_CASE(
- "Construct singleton dram, store 0, 1th element in three cycles much "
- "conflict",
- "[dram]")
+TEST_CASE_METHOD(
+ DramFixture, "store 0th element in DELAY cycles with conflict", "[dram]")
{
- int delay = 2;
- Dram *d = new Dram(1, 2);
- std::array<signed int, LINE_SIZE> expected = {0, 0, 0, 0};
- std::array<signed int, LINE_SIZE> actual = d->view(0, 1)[0];
+ Response r;
+ signed int w;
+ int i;
CHECK(expected == actual);
- signed int w = 0x11223344;
-
- int i;
- Response r;
- for (i = 0; i < delay; ++i) {
- r = d->write_word(MEM, w, 0x00000000);
+ w = 0x11223344;
+ for (i = 0; i < this->delay; ++i) {
+ r = this->d->write_word(MEM, w, 0x0);
CHECK(r == WAIT);
-
- r = d->write_word(FETCH, w, 0x00000001);
+ r = this->d->write_word(FETCH, w, 0x1);
CHECK(r == WAIT);
+ this->d->resolve();
+ // check for early modifications
actual = d->view(0, 1)[0];
REQUIRE(expected == actual);
- d->resolve();
}
- r = d->write_word(MEM, w, 0x00000000);
- CHECK(r == OK);
- r = d->write_word(FETCH, w, 0x00000001);
+ r = d->write_word(MEM, w, 0x0);
+ REQUIRE(r == OK);
+ // clock cycle did NOT resolve yet!
+ // this fetch should not make progress
+ r = d->write_word(FETCH, w, 0x1);
CHECK(r == WAIT);
- d->resolve();
+ this->d->resolve();
- actual = d->view(0, 1)[0];
expected.at(0) = w;
+ actual = d->view(0, 1)[0];
REQUIRE(expected == actual);
- for (i = 0; i < delay; ++i) {
- r = d->write_word(FETCH, w, 0x00000001);
- CHECK(r == WAIT);
+ for (i = 0; i < this->delay; ++i) {
+ r = this->d->write_word(FETCH, w, 0x1);
+ this->d->resolve();
- r = d->write_word(MEM, w, 0x00000003);
+ // check response
CHECK(r == WAIT);
-
+ // check for early modifications
actual = d->view(0, 1)[0];
REQUIRE(expected == actual);
- d->resolve();
}
- r = d->write_word(FETCH, w, 0x00000001);
- actual = d->view(0, 1)[0];
- CHECK(r == OK);
- r = d->write_word(MEM, w, 0x00000003);
- CHECK(r == WAIT);
-
- expected.at(1) = w;
- actual = d->view(0, 1)[0];
- REQUIRE(expected == actual);
-
- delete d;
-}
-
-TEST_CASE(
- "Construct singleton dram, store line in zero cycles", "[dram]")
-{
- Dram *d = new Dram(1, 0);
- std::array<signed int, LINE_SIZE> expected = {0, 0, 0, 0};
- std::array<signed int, LINE_SIZE> actual = d->view(0, 1)[0];
- CHECK(expected == actual);
-
- signed int w = 0x11223344;
- expected = {w, w+1, w+2, w+3};
-
- Response r = d->write_line(MEM, expected, 0x00000000);
+ r = d->write_word(FETCH, w, 0x1);
CHECK(r == OK);
+ this->d->resolve();
actual = d->view(0, 1)[0];
+ expected.at(1) = w;
REQUIRE(expected == actual);
-
- delete d;
}
-TEST_CASE(
- "Construct singleton dram, store line in three cycles", "[dram]")
+TEST_CASE_METHOD(DramFixture, "store line in DELAY cycles", "[dram]")
{
- int delay = 3;
- Dram *d = new Dram(1, delay);
- std::array<signed int, LINE_SIZE> expected = {0, 0, 0, 0};
- std::array<signed int, LINE_SIZE> actual = d->view(0, 1)[0];
+ Response r;
+ signed int w;
+ int i;
+ std::array<signed int, LINE_SIZE> buffer;
CHECK(expected == actual);
- signed int w = 0x11223344;
- std::array<signed int, LINE_SIZE> written_line = {w, w+1, w+2, w+3};
+ w = 0x11223344;
+ buffer = {w, w + 1, w + 2, w + 3};
+ for (i = 0; i < this->delay; ++i) {
+ r = this->d->write_line(MEM, buffer, 0x0);
+ this->d->resolve();
- int i;
- Response r;
- for (i = 0; i < delay; ++i) {
- r = d->write_line(MEM, written_line, 0x00000000);
+ // check response
CHECK(r == WAIT);
-
+ // check for early modifications
actual = d->view(0, 1)[0];
REQUIRE(expected == actual);
- d->resolve();
}
- r = d->write_line(MEM, written_line, 0x00000000);
+ r = d->write_line(MEM, buffer, 0x0);
CHECK(r == OK);
- d->resolve();
- expected = written_line;
actual = d->view(0, 1)[0];
+ expected = buffer;
REQUIRE(expected == actual);
-
- delete d;
}
-TEST_CASE(
- "Construct singleton dram, store line in three cycles no "
- "conflict",
- "[dram]")
+TEST_CASE_METHOD(
+ DramFixture, "store line in DELAY cycles no conflict", "[dram]")
{
- int delay = 3;
- Dram *d = new Dram(1, delay);
- std::array<signed int, LINE_SIZE> expected = {0, 0, 0, 0};
- std::array<signed int, LINE_SIZE> actual = d->view(0, 1)[0];
+ Response r;
+ signed int w;
+ int i;
+ std::array<signed int, LINE_SIZE> buffer;
CHECK(expected == actual);
- signed int w = 0x11223344;
- std::array<signed int, LINE_SIZE> written_line = {w, w+1, w+2, w+3};
+ w = 0x11223344;
+ buffer = {w, w + 1, w + 2, w + 3};
+ for (i = 0; i < this->delay; ++i) {
+ r = this->d->write_line(MEM, buffer, 0x0);
+ this->d->resolve();
- int i;
- Response r;
- for (i = 0; i < delay; ++i) {
- r = d->write_line(MEM, written_line, 0x00000000);
+ // check response
CHECK(r == WAIT);
-
+ // check for early modifications
actual = d->view(0, 1)[0];
REQUIRE(expected == actual);
- d->resolve();
}
- r = d->write_line(MEM, written_line, 0x00000000);
+ r = this->d->write_line(MEM, buffer, 0x0);
REQUIRE(r == OK);
// clock cycle did NOT resolve yet!
// this fetch should not make progress
- r = d->write_line(FETCH, written_line, 0x00000001);
- CHECK(r == WAIT);
-
- actual = d->view(0, 1)[0];
+ r = this->d->write_line(FETCH, buffer, 0x1);
CHECK(r == WAIT);
d->resolve();
- expected = written_line;
+ expected = buffer;
actual = d->view(0, 1)[0];
REQUIRE(expected == actual);
- written_line = {w+4, w+5, w+6, w+7};
+ buffer = {w + 4, w + 5, w + 6, w + 7};
+ for (i = 0; i < this->delay; ++i) {
+ r = this->d->write_line(FETCH, buffer, 0x1);
+ this->d->resolve();
- for (i = 0; i < delay; ++i) {
- r = d->write_line(FETCH, written_line, 0x00000001);
+ // check response
CHECK(r == WAIT);
-
+ // check for early modifications
actual = d->view(0, 1)[0];
REQUIRE(expected == actual);
- d->resolve();
}
- r = d->write_line(FETCH, written_line, 0x00000001);
- actual = d->view(0, 1)[0];
+ r = this->d->write_line(FETCH, buffer, 0x1);
CHECK(r == OK);
+ d->resolve();
- expected = written_line;
+ expected = buffer;
actual = d->view(0, 1)[0];
REQUIRE(expected == actual);
-
- delete d;
}
-TEST_CASE(
- "Construct singleton dram, store line in three cycles much "
- "conflict",
- "[dram]")
+TEST_CASE_METHOD(
+ DramFixture, "store line in DELAY cycles with conflict", "[dram]")
{
- int delay = 2;
- Dram *d = new Dram(1, 2);
- std::array<signed int, LINE_SIZE> expected = {0, 0, 0, 0};
- std::array<signed int, LINE_SIZE> actual = d->view(0, 1)[0];
+ Response r;
+ signed int w;
+ int i;
+ std::array<signed int, LINE_SIZE> buffer;
CHECK(expected == actual);
- signed int w = 0x11223344;
- std::array<signed int, LINE_SIZE> written_line = {w, w+1, w+2, w+3};
-
- int i;
- Response r;
- for (i = 0; i < delay; ++i) {
- r = d->write_line(MEM, written_line, 0x00000000);
+ w = 0x11223344;
+ buffer = {w, w + 1, w + 2, w + 3};
+ for (i = 0; i < this->delay; ++i) {
+ r = this->d->write_line(MEM, buffer, 0x0);
CHECK(r == WAIT);
-
- r = d->write_line(FETCH, written_line, 0x00000001);
+ r = d->write_line(FETCH, buffer, 0x1);
CHECK(r == WAIT);
+ this->d->resolve();
+ // check for early modifications
actual = d->view(0, 1)[0];
REQUIRE(expected == actual);
- d->resolve();
}
- r = d->write_line(MEM, written_line, 0x00000000);
+ r = d->write_line(MEM, buffer, 0x0);
CHECK(r == OK);
- r = d->write_line(FETCH, written_line, 0x00000001);
+ // clock cycle did NOT resolve yet!
+ // this fetch should not make progress
+ r = d->write_line(FETCH, buffer, 0x01);
CHECK(r == WAIT);
d->resolve();
actual = d->view(0, 1)[0];
- expected = written_line;
+ expected = buffer;
REQUIRE(expected == actual);
- written_line = {w+4, w+5, w+6, w+7};
- for (i = 0; i < delay; ++i) {
- r = d->write_line(FETCH, written_line, 0x00000001);
- CHECK(r == WAIT);
+ buffer = {w + 4, w + 5, w + 6, w + 7};
+ for (i = 0; i < this->delay; ++i) {
+ r = this->d->write_line(FETCH, buffer, 0x1);
+ this->d->resolve();
- r = d->write_line(MEM, written_line, 0x00000003);
+ // check response
CHECK(r == WAIT);
-
+ // check for early modifications
actual = d->view(0, 1)[0];
REQUIRE(expected == actual);
- d->resolve();
}
- r = d->write_line(FETCH, written_line, 0x00000001);
- actual = d->view(0, 1)[0];
+ r = this->d->write_line(FETCH, buffer, 0x1);
CHECK(r == OK);
- r = d->write_line(MEM, written_line, 0x00000003);
- CHECK(r == WAIT);
+ d->resolve();
- expected = written_line;
+ expected = buffer;
actual = d->view(0, 1)[0];
REQUIRE(expected == actual);
-
- delete d;
}
-TEST_CASE("Construct singleton dram, write a line to an address in 0 cycles, read in 0 cycles", "[dram]")
+TEST_CASE_METHOD(
+ DramFixture, "store line in DELAY cycles, read in DELAY cycles", "[dram]")
{
- Dram *d = new Dram(1, 0);
- std::array<signed int, LINE_SIZE> expected = {0, 0, 0, 0};
- std::array<signed int, LINE_SIZE> actual = d->view(0, 1)[0];
- CHECK(expected == actual);
-
- signed int w = 0x11223311;
- expected = {w, w+1, w+2, w+3};
- int addr = 0x00000000;
- d->write_line(MEM, expected, addr);
-
- Response r = d->read_line(MEM, 0x00000000, actual);
- CHECK(r == OK);
- REQUIRE(expected == actual);
-
- r = d->read_line(MEM, 0x00000001, actual);
- CHECK(r == OK);
- REQUIRE(expected == actual);
-
- r = d->read_line(MEM, 0x00000002, actual);
- CHECK(r == OK);
- REQUIRE(expected == actual);
-
- r = d->read_line(MEM, 0x00000003, actual);
- CHECK(r == OK);
- REQUIRE(expected == actual);
-
- delete d;
-}
-
-TEST_CASE("Construct singleton dram, write a line to an address in three cycles, read it in three cycles", "[dram]")
-{
- int delay = 3;
- Dram *d = new Dram(1, delay);
- std::array<signed int, LINE_SIZE> expected = {0, 0, 0, 0};
- std::array<signed int, LINE_SIZE> actual = d->view(0, 1)[0];
+ Response r;
+ signed int w;
+ int i, addr;
CHECK(expected == actual);
- signed int w = 0x11223311;
- expected = {w, w+1, w+2, w+3};
- int addr = 0x00000000;
-
- int i;
- Response r;
-
- for(i=0; i<delay; ++i) {
+ w = 0x11223311;
+ addr = 0x0;
+ expected = {w, w + 1, w + 2, w + 3};
+ for (i = 0; i < this->delay; ++i) {
r = d->write_line(MEM, expected, addr);
- d->resolve();
- }
- r = d->write_line(MEM, expected, addr);
- d->resolve();
-
- for (i = 0; i < delay; ++i) {
- r = d->read_line(MEM, 0x00000000, actual);
CHECK(r == WAIT);
- REQUIRE(expected != actual);
d->resolve();
}
-
- r = d->read_line(MEM, 0x00000000, actual);
+ r = d->write_line(MEM, expected, addr);
CHECK(r == OK);
d->resolve();
- REQUIRE(expected == actual);
- delete d;
-}
-TEST_CASE(
- "Construct singleton dram, store line in 3 cycles, read line in 3 cycles with no conflict","[dram]")
-{
- int delay = 3;
- Dram *d = new Dram(1, delay);
- std::array<signed int, LINE_SIZE> expected = {0, 0, 0, 0};
- std::array<signed int, LINE_SIZE> actual = d->view(0, 1)[0];
- CHECK(expected == actual);
-
- signed int w = 0x11223311;
- expected = {w, w+1, w+2, w+3};
- int addr = 0x00000000;
-
- int i;
- Response r;
- for(int j=0; j<delay; ++j) {
- r = d->write_line(MEM, expected, addr);
+ for (i = 0; i < this->delay; ++i) {
+ r = d->read_line(MEM, addr, actual);
d->resolve();
- }
- r = d->write_line(MEM, expected, addr++);
- d->resolve();
- for (i = 0; i < delay; ++i) {
- r = d->read_line(MEM, 0x00000000, actual);
CHECK(r == WAIT);
REQUIRE(expected != actual);
- d->resolve();
}
- r = d->read_line(MEM, 0x00000000, actual);
- REQUIRE(r == OK);
- r = d->read_line(FETCH, 0x00000003, actual);
- CHECK(r == WAIT);
+ r = d->read_line(MEM, addr, actual);
d->resolve();
- REQUIRE(expected == actual);
- actual = {0,0,0,0};
- for (i = 0; i < delay; ++i) {
- r = d->read_line(FETCH, 0x00000000, actual);
- CHECK(r == WAIT);
- REQUIRE(expected != actual);
- d->resolve();
- }
-
- r = d->read_line(FETCH, 0x00000000, actual);
- REQUIRE(r == OK);
- r = d->read_line(MEM, 0x00000002, actual);
- CHECK(r == WAIT);
- d->resolve();
+ CHECK(r == OK);
REQUIRE(expected == actual);
-
- delete d;
-
}
-TEST_CASE(
- "Construct singleton dram, store line in 3 cycles, read line in 3 cycles with much conflict","[dram]")
+TEST_CASE_METHOD(
+ DramFixture,
+ "store line in DELAY cycles, read in DELAY cycles with conflict",
+ "[dram]")
{
- int delay = 3;
- Dram *d = new Dram(1, delay);
- std::array<signed int, LINE_SIZE> expected = {0, 0, 0, 0};
- std::array<signed int, LINE_SIZE> actual = d->view(0, 1)[0];
- CHECK(expected == actual);
-
- signed int w = 0x11223311;
- expected = {w, w+1, w+2, w+3};
- int addr = 0x00000000;
-
- int i;
Response r;
- for(int j=0; j<delay; ++j) {
- r = d->write_line(MEM, expected, addr);
- d->resolve();
- }
- r = d->write_line(MEM, expected, addr++);
- d->resolve();
-
+ signed int w;
+ int i, addr;
+ CHECK(expected == actual);
+ w = 0x11223311;
+ addr = 0x0;
+ expected = {w, w + 1, w + 2, w + 3};
for (i = 0; i < delay; ++i) {
- r = d->read_line(MEM, 0x00000000, actual);
- CHECK(r == WAIT);
- REQUIRE(expected != actual);
- r = d->read_line(FETCH, 0x00000002, actual);
+ r = d->write_line(MEM, expected, addr);
CHECK(r == WAIT);
- REQUIRE(expected != actual);
- d->resolve();
- }
-
- r = d->read_line(MEM, 0x00000000, actual);
- REQUIRE(r == OK);
- r = d->read_line(FETCH, 0x00000003, actual);
- CHECK(r == WAIT);
- d->resolve();
- REQUIRE(expected == actual);
- actual = {0,0,0,0};
- for (i = 0; i < delay; ++i) {
- r = d->read_line(FETCH, 0x00000000, actual);
+ r = d->read_line(FETCH, addr, actual);
CHECK(r == WAIT);
- REQUIRE(expected != actual);
- r = d->read_line(MEM, 0x00000002, actual);
- CHECK(r == WAIT);
- REQUIRE(expected != actual);
+
d->resolve();
}
-
- r = d->read_line(FETCH, 0x00000000, actual);
- REQUIRE(r == OK);
- r = d->read_line(MEM, 0x00000002, actual);
+ r = d->write_line(MEM, expected, addr);
+ CHECK(r == OK);
+ r = d->read_line(FETCH, addr, actual);
CHECK(r == WAIT);
d->resolve();
- REQUIRE(expected == actual);
-
- delete d;
-
-}
-
-
-TEST_CASE("Construct singleton dram, write a line to an address one element at a time, read it in zero cycles", "[dram]")
-{
- Dram *d = new Dram(1, 0);
- std::array<signed int, LINE_SIZE> expected = {0, 0, 0, 0};
- std::array<signed int, LINE_SIZE> actual = d->view(0, 1)[0];
- CHECK(expected == actual);
-
- signed int w = 0x11223311;
- int addr = 0x00000000;
- for(int i=0; i<LINE_SIZE; ++i) {
- Response r = d->write_word(MEM, w, addr++);
- CHECK(r == OK);
- expected.at(i) = w++;
- }
-
- Response r = d->read_line(MEM, 0x00000000, actual);
- CHECK(r == OK);
- REQUIRE(expected == actual);
-
- r = d->read_line(MEM, 0x00000001, actual);
- CHECK(r == OK);
- REQUIRE(expected == actual);
- r = d->read_line(MEM, 0x00000002, actual);
- CHECK(r == OK);
- REQUIRE(expected == actual);
-
- r = d->read_line(MEM, 0x00000003, actual);
- CHECK(r == OK);
- REQUIRE(expected == actual);
-
- delete d;
-}
-
-TEST_CASE("Construct singleton dram, write a line to an address one element at a time in 12 cycles, read it in three cycles", "[dram]")
-{
- int delay = 3;
- Dram *d = new Dram(1, delay);
- std::array<signed int, LINE_SIZE> expected = {0, 0, 0, 0};
- std::array<signed int, LINE_SIZE> actual = d->view(0, 1)[0];
- CHECK(expected == actual);
-
- signed int w = 0x11223311;
- int addr = 0x00000000;
- int i;
- Response r;
- for(i=0; i<LINE_SIZE; ++i) {
- for(int j=0; j<delay; ++j) {
- r = d->write_word(MEM, w, addr);
- d->resolve();
- }
- r = d->write_word(MEM, w, addr++);
+ for (i = 0; i < this->delay; ++i) {
+ r = d->read_line(MEM, addr, actual);
d->resolve();
- expected.at(i) = w++;
- }
- for (i = 0; i < delay; ++i) {
- r = d->read_line(MEM, 0x00000000, actual);
CHECK(r == WAIT);
REQUIRE(expected != actual);
- d->resolve();
}
- r = d->read_line(MEM, 0x00000000, actual);
- CHECK(r == OK);
+ r = d->read_line(MEM, addr, actual);
d->resolve();
+
+ CHECK(r == OK);
REQUIRE(expected == actual);
- delete d;
}
-TEST_CASE(
- "Construct singleton dram, store line one element at a time in 12 cycles, read line in 3 cycles with no conflict","[dram]")
+TEST_CASE_METHOD(
+ DramFixture,
+ "store line in DELAY cycles, read one element at a time in DELAY cycles "
+ "with conflict",
+ "[dram]")
{
- int delay = 3;
- Dram *d = new Dram(1, delay);
- std::array<signed int, LINE_SIZE> expected = {0, 0, 0, 0};
- std::array<signed int, LINE_SIZE> actual = d->view(0, 1)[0];
- CHECK(expected == actual);
-
- signed int w = 0x11223311;
- int addr = 0x00000000;
- int i;
Response r;
- for(i=0; i<LINE_SIZE; ++i) {
- for(int j=0; j<delay; ++j) {
- r = d->write_word(MEM, w, addr);
- d->resolve();
- }
- r = d->write_word(MEM, w, addr++);
- d->resolve();
- expected.at(i) = w++;
- }
+ signed int w, a;
+ int i, j, addr;
+ CHECK(expected == actual);
- for (i = 0; i < delay; ++i) {
- r = d->read_line(MEM, 0x00000000, actual);
+ w = 0x11223311;
+ a = 0x0;
+ addr = 0x0;
+ expected = {w, w + 1, w + 2, w + 3};
+ for (i = 0; i < this->delay; ++i) {
+ r = d->write_line(MEM, expected, addr);
CHECK(r == WAIT);
- REQUIRE(expected != actual);
d->resolve();
}
-
- r = d->read_line(MEM, 0x00000000, actual);
- REQUIRE(r == OK);
- r = d->read_line(FETCH, 0x00000003, actual);
- CHECK(r == WAIT);
+ r = d->write_line(MEM, expected, addr);
+ CHECK(r == OK);
d->resolve();
- REQUIRE(expected == actual);
- actual = {0,0,0,0};
- for (i = 0; i < delay; ++i) {
- r = d->read_line(FETCH, 0x00000000, actual);
- CHECK(r == WAIT);
- REQUIRE(expected != actual);
- d->resolve();
- }
-
- r = d->read_line(FETCH, 0x00000000, actual);
- REQUIRE(r == OK);
- r = d->read_line(MEM, 0x00000002, actual);
- CHECK(r == WAIT);
- d->resolve();
+ actual = d->view(0, 1)[0];
REQUIRE(expected == actual);
-
- delete d;
-
-}
-
-TEST_CASE(
- "Construct singleton dram, store line one element at a time in 12 cycles, read line in 3 cycles with much conflict","[dram]")
-{
- int delay = 3;
- Dram *d = new Dram(1, delay);
- std::array<signed int, LINE_SIZE> expected = {0, 0, 0, 0};
- std::array<signed int, LINE_SIZE> actual = d->view(0, 1)[0];
- CHECK(expected == actual);
- signed int w = 0x11223311;
- int addr = 0x00000000;
- int i;
- Response r;
- for(i=0; i<LINE_SIZE; ++i) {
- for(int j=0; j<delay; ++j) {
- r = d->write_word(MEM, w, addr);
+ for (i = 0; i < LINE_SIZE; ++i) {
+ for (j = 0; j < this->delay; ++j) {
+ r = d->read_word(MEM, addr, a);
d->resolve();
- }
- r = d->write_word(MEM, w, addr++);
- d->resolve();
- expected.at(i) = w++;
- }
- for (i = 0; i < delay; ++i) {
- r = d->read_line(MEM, 0x00000000, actual);
- CHECK(r == WAIT);
- REQUIRE(expected != actual);
- r = d->read_line(FETCH, 0x00000002, actual);
- CHECK(r == WAIT);
- REQUIRE(expected != actual);
+ CHECK(r == WAIT);
+ REQUIRE(0x0 == a);
+ }
+ r = d->read_word(MEM, addr++, a);
d->resolve();
- }
-
- r = d->read_line(MEM, 0x00000000, actual);
- REQUIRE(r == OK);
- r = d->read_line(FETCH, 0x00000003, actual);
- CHECK(r == WAIT);
- d->resolve();
- REQUIRE(expected == actual);
+ CHECK(r == OK);
+ REQUIRE(w++ == a);
- actual = {0,0,0,0};
- for (i = 0; i < delay; ++i) {
- r = d->read_line(FETCH, 0x00000000, actual);
- CHECK(r == WAIT);
- REQUIRE(expected != actual);
- r = d->read_line(MEM, 0x00000002, actual);
- CHECK(r == WAIT);
- REQUIRE(expected != actual);
- d->resolve();
+ a = 0;
}
-
- r = d->read_line(FETCH, 0x00000000, actual);
- REQUIRE(r == OK);
- r = d->read_line(MEM, 0x00000002, actual);
- CHECK(r == WAIT);
- d->resolve();
- REQUIRE(expected == actual);
-
- delete d;
-
}
-
-TEST_CASE("Sidedoor bypasses delay", "[dram]")
+TEST_CASE_METHOD(DramFixture, "Sidedoor bypasses delay", "[dram]")
{
- int delay = 3;
- Dram *d = new Dram(1, delay);
- std::array<signed int, LINE_SIZE> expected = {0, 0, 0, 0};
- std::array<signed int, LINE_SIZE> actual = d->view(0, 1)[0];
- CHECK(expected == actual);
-
- signed int w = 0x11223344;
-
- int i;
Response r;
- for (i = 0; i < delay - 1; ++i) {
- r = d->write_word(MEM, w, 0x00000000);
- CHECK(r == WAIT);
-
- actual = d->view(0, 1)[0];
- REQUIRE(expected == actual);
- d->resolve();
- }
-
- r = d->write_word(MEM, w, 0x00000000);
- CHECK(r == WAIT);
- actual = d->view(0, 1)[0];
- REQUIRE(expected == actual);
+ signed int w;
+ CHECK(expected == actual);
- r = d->write_word(SIDE, w, 0x00000001);
- actual = d->view(0, 1)[0];
+ w = 0x11223344;
+ r = this->d->write_word(SIDE, w, 0x0);
CHECK(r == OK);
- expected.at(1) = w;
+ expected.at(0) = w;
actual = d->view(0, 1)[0];
REQUIRE(expected == actual);
-
- delete d;
}