diff options
| author | bd <bdunahu@operationnull.com> | 2025-03-11 11:54:21 -0400 |
|---|---|---|
| committer | bd <bdunahu@operationnull.com> | 2025-03-11 11:54:21 -0400 |
| commit | 7c226db9f04de7061596b98763dc408d601d74e1 (patch) | |
| tree | c6d4ff93026441bff50de16633706ee3dd2ea196 /inc | |
| parent | 202f9a05d449ddc1160584c4e8a87f397f248e94 (diff) | |
Clarify size of mem and cache in definitions, CLI print invalid tags
Diffstat (limited to 'inc')
| -rw-r--r-- | inc/cache.h | 4 | ||||
| -rw-r--r-- | inc/definitions.h | 23 |
2 files changed, 13 insertions, 14 deletions
diff --git a/inc/cache.h b/inc/cache.h index 04f6181..a566f24 100644 --- a/inc/cache.h +++ b/inc/cache.h @@ -31,7 +31,7 @@ class Cache : public Storage * TODO this doesn't seem like good object-oriented practice. * @return this->meta */ - std::array<std::array<int, 2>, L1_CACHE_SIZE> get_meta() const; + std::array<std::array<int, 2>, L1_CACHE_LINES> get_meta() const; private: /** @@ -47,7 +47,7 @@ class Cache : public Storage * element in `data` is invalid. If the most second value of an element * is nonzero, the corresponding element in `data` is dirty. */ - std::array<std::array<int, 2>, L1_CACHE_SIZE> meta; + std::array<std::array<int, 2>, L1_CACHE_LINES> meta; }; std::ostream &operator<<(std::ostream &os, const Cache &c); diff --git a/inc/definitions.h b/inc/definitions.h index f015ce9..1d68a60 100644 --- a/inc/definitions.h +++ b/inc/definitions.h @@ -13,28 +13,27 @@ #define LINE_SIZE static_cast<int>(pow(2, 2)) /** + * The number of bits to specify a memory word * The number of bits to specify a memory line - * calculated as: (/ (expt 2 15) 4) + * The total number of lines in memory */ -#define MEM_SPEC 8 -/** - * The total number of words in memory - */ -#define MEM_SIZE static_cast<int>(pow(2, MEM_SPEC)) +#define MEM_WORD_SPEC 10 +#define MEM_LINE_SPEC static_cast<unsigned int>(MEM_WORD_SPEC - LINE_SPEC) +#define MEM_LINES static_cast<int>(pow(2, MEM_LINE_SPEC)) /** + * The number of bits to specify a l1 cache word * The number of bits to specify a l1 cache line + * The total number of lines in l1 cache */ -#define L1_CACHE_SPEC 5 -/** - * The total number of words in l1 cache - */ -#define L1_CACHE_SIZE static_cast<int>(pow(2, L1_CACHE_SPEC)) +#define L1_CACHE_WORD_SPEC 7 +#define L1_CACHE_LINE_SPEC static_cast<unsigned int>(L1_CACHE_WORD_SPEC - LINE_SPEC) +#define L1_CACHE_LINES static_cast<int>(pow(2, L1_CACHE_LINE_SPEC)) /** * The total number of cycles a memory access takes. */ -#define MEM_DELAY 4 +#define MEM_DELAY 3 /** * The total number of cycles a level one cache access takes |