diff options
author | Siddarth-Suresh <65844402+Siddarth-Suresh@users.noreply.github.com> | 2025-04-27 00:15:30 -0400 |
---|---|---|
committer | Siddarth-Suresh <65844402+Siddarth-Suresh@users.noreply.github.com> | 2025-04-27 00:15:30 -0400 |
commit | 66dbfb6ee729e1ff8352c876e6c42aca2081f2e5 (patch) | |
tree | ac97acd5f214213400ea8de0175399daed03586b | |
parent | ee4af301dfd61b21e8aa3ce04e7a77b716d65f24 (diff) |
EX changes for LOADV and STOREV
-rw-r--r-- | src/ex.cc | 15 |
1 files changed, 14 insertions, 1 deletions
@@ -28,7 +28,7 @@ void EX::advance_helper() { signed int s1, s2, s3; std::array<signed int, V_R_LIMIT> v1, v2, v3; - signed int v_len; + signed int v_len, v_immediate, v_base_addr; unsigned int pc; Mnemonic m; @@ -39,6 +39,12 @@ void EX::advance_helper() v2 = this->curr_instr->operands.vector.slot_two; v3 = this->curr_instr->operands.vector.slot_three; v_len = this->curr_instr->slot_A; + if(this->curr_instr->slot_C){ + v_immediate = this->curr_instr->slot_C; + } + if(this->curr_instr->slot_B){ + v_base_addr = this->curr_instr->slot_B; + } /*if(v_len == 0){ //clear vector reg v1.fill(0); @@ -210,8 +216,15 @@ void EX::advance_helper() } break; case CEV: + bool equal = true; + for(int i=0;i<v_len;i++){ + if(v1[i] != v2[i]){ + equal = false; + } + } case LOADV: case STOREV: + v_base_addr = v_base_addr + v_immediate; break; case RET: |