summaryrefslogtreecommitdiff
path: root/inc/wb.h
diff options
context:
space:
mode:
authorSiddarth Suresh <155843085+SiddarthSuresh98@users.noreply.github.com>2025-05-11 23:39:06 -0400
committerGitHub <noreply@github.com>2025-05-11 23:39:06 -0400
commitf02bea04284d33a2d014f636baa6a861b73f6c41 (patch)
treece89a55af60b01f6b4129d7539d07c08bfaa1b9a /inc/wb.h
parenta35eb451889f0efa99ff7fe1c0a3a76afd5e7ad5 (diff)
parent43588597069587f6846a7d64a1957435bec5429d (diff)
Merge pull request #79 from bdunahu/bdunahuHEADmaster
Replace LOADV, STOREV, with strided load (SRDL), strided store (SRDS), add vector rotate (ROTV)
Diffstat (limited to 'inc/wb.h')
-rw-r--r--inc/wb.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/inc/wb.h b/inc/wb.h
index 35c9240..bbba5bf 100644
--- a/inc/wb.h
+++ b/inc/wb.h
@@ -51,7 +51,8 @@ class WB : public Stage
* @return the vector register to be stored, obtained by copying the
* unfilled elements in the destination register to the source. This is
* required to ensure what is written back only changes VECTOR_LENGTH number
- * of elements.
+ * of elements. Correctly handles zeroing out ALU operations if the VECTOR
+ * LENGTH number is zero.
*/
std::array<signed int, V_R_LIMIT> copy_extra_vector_elements();
};