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authorSiddarth-Suresh <65844402+Siddarth-Suresh@users.noreply.github.com>2025-03-31 20:51:20 -0400
committerSiddarth-Suresh <65844402+Siddarth-Suresh@users.noreply.github.com>2025-03-31 20:51:20 -0400
commit574212dafcf1c4bdb7d5e6aaa577b74345988d67 (patch)
tree6132673f5aa85f2488d6f7de77fb33538b7320d3 /src/sim/wb.cc
parent598da346f59503442ba0b4badfd9ac8b58af4a89 (diff)
CR Comments
Diffstat (limited to 'src/sim/wb.cc')
-rw-r--r--src/sim/wb.cc4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/sim/wb.cc b/src/sim/wb.cc
index 480af05..ac47f25 100644
--- a/src/sim/wb.cc
+++ b/src/sim/wb.cc
@@ -15,7 +15,9 @@ void WB::advance_helper() {
if(reg >= GPR_NUM){
// TODO: handle vector instructions
} else {
- this->gprs[reg] = this->curr_instr->get_s1();
+ if(this->curr_instr->get_mnemonic() != STORE && this->curr_instr->get_mnemonic() != STOREV){
+ this->gprs[reg] = this->curr_instr->get_s1();
+ }
}
}
} else if (this->curr_instr->get_type() == J) {