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RISC-VECTOR.git
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A simulator for the custom RISC-V[ECTOR] ISA written in C++
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wb.cc
Age
Commit message (
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Author
2025-04-22
Remove subfolders
bd
2025-04-22
Remove the accessor object
bd
2025-04-21
add RET instruction
bd
2025-04-21
Add licensing information
bd
2025-04-17
Functioning PUSH/POP
bd
2025-04-17
The pipeline says some things and there are numbers
bd
2025-04-17
Swap the source and destination registers for LOAD, final fix
bd
2025-04-17
Keep track of checked out in DTO to simplify wb cond logic (bug)
bd
2025-04-01
Finish adding initial tests for full pipeline
bd
2025-04-01
Lots of fixes and tests
bd
2025-04-01
Fix a lot of pipeline bugs
bd
2025-04-01
Ensure all stages only do work if they are not 'OK'
bd
2025-03-31
CR Comments
Siddarth-Suresh
2025-03-31
MEM WB stage
Siddarth-Suresh
2025-03-30
Add mock stage, proper decode tests
bd
2025-03-30
Minor simplification to API between pipeline components
bd
2025-03-29
Fetch stage properly holds objects until parent is ready
bd
2025-03-29
Add parameter to Stage::advance so status can transfer down the pipe
bd
2025-03-27
Instr, InstrDTO gets/sets, other structures required for decode
bd
2025-03-26
Add fetch stage implementation, tests, program loading, DTO object
bd
2025-03-24
Add skeleton classes for 5 major pipeline stages
bd
