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| author | Siddarth Suresh <155843085+SiddarthSuresh98@users.noreply.github.com> | 2025-03-30 14:02:23 -0400 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-03-30 14:02:23 -0400 |
| commit | eedf9686eb60f2008e7766cc9a5d3e037b9dae64 (patch) | |
| tree | 0cfa9009fe483b72940727f3b5a4236f779fe6e7 /src/sim/wb.cc | |
| parent | d20623d031cf909d8892c2db38cf2e2e02bc6a9b (diff) | |
| parent | 8e56373a5436852fe9c7934e03d7b57493625003 (diff) | |
Merge pull request #40 from bdunahu/bdunahu
Minor simplification to API between pipeline components
-- Fixed memory leaks
Diffstat (limited to 'src/sim/wb.cc')
| -rw-r--r-- | src/sim/wb.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/sim/wb.cc b/src/sim/wb.cc index bdea65a..7a8d64c 100644 --- a/src/sim/wb.cc +++ b/src/sim/wb.cc @@ -6,4 +6,4 @@ WB::WB(Stage *stage) : Stage(stage) { this->id = WRITE; } -Response WB::advance(InstrDTO &next_instr, Response p) { return OK; } +InstrDTO *WB::advance(Response p) { return nullptr; } |