Merge pull request #36 from bdunahu/bdunahu

Add fetch stage implementation, tests, program loading, DTO object
Base classes plus base tests for Instruction Fetch stage with a default program

2 files changed, 114 insertions, 2 deletions

diff --git a/tests/controller.cc b/tests/controller.cc
index a1b8123..e3b9f3c 100644
--- a/tests/controller.cc
+++ b/tests/controller.cc
@@ -1,6 +1,11 @@
 #include "controller.h"
 #include "cache.h"
 #include "dram.h"
+#include "ex.h"
+#include "id.h"
+#include "if.h"
+#include "mm.h"
+#include "wb.h"
 #include <algorithm>
 #include <catch2/catch_test_macros.hpp>
 
@@ -10,7 +15,14 @@ class ControllerPipeFixture
 	ControllerPipeFixture()
 	{
 		this->c = new Cache(new Dram(3), 1);
-		this->ct = new Controller(this->c, true);
+
+		IF *f = new IF(nullptr);
+		ID *d = new ID(f);
+		EX *e = new EX(d);
+		MM *m = new MM(e);
+		WB *w = new WB(m);
+
+		this->ct = new Controller(w, this->c, true);
 	}
 	~ControllerPipeFixture()
 	{
@@ -31,7 +43,7 @@ TEST_CASE_METHOD(
 
 	gprs = this->ct->get_gprs();
 
-	CHECK(this->ct->get_clock_cycle() == 0);
+	CHECK(this->ct->get_clock_cycle() == 1);
 	CHECK(std::all_of(
 		gprs.begin(), gprs.end(), [](int value) { return value == 0; }));
 	// change me later
diff --git a/tests/if.cc b/tests/if.cc
new file mode 100644
index 0000000..5c1b645
--- /dev/null
+++ b/tests/if.cc
@@ -0,0 +1,100 @@
+#include "if.h"
+#include "cache.h"
+#include "controller.h"
+#include "dram.h"
+#include "instrDTO.h"
+#include <catch2/catch_test_macros.hpp>
+
+class IFPipeFixture
+{
+  public:
+	IFPipeFixture()
+	{
+		Dram *d;
+
+		d = new Dram(this->m_delay);
+		// 0xC00 is a nop
+		p = {0xC000, 0xC001, 0xC002, 0xC003};
+		d->load(p);
+
+		this->c = new Cache(d, this->c_delay);
+		this->f = new IF(nullptr);
+		this->ct = new Controller(this->f, this->c, true);
+	}
+	~IFPipeFixture()
+	{
+		delete this->ct;
+		delete this->c;
+	};
+
+	/**
+	 * Fetch a clean line not in cache.
+	 */
+	void fetch_through(InstrDTO &instr)
+	{
+		int i;
+		Response r;
+
+		for (i = 0; i < this->m_delay + 1; ++i) {
+			r = this->ct->advance(instr);
+			// check response
+			CHECK(r == BLOCKED);
+		}
+		this->fetch_cache(instr);
+	}
+
+	/**
+	 * Fetch a line in cache.
+	 */
+	void fetch_cache(InstrDTO &instr)
+	{
+		int i;
+		Response r;
+
+		for (i = 0; i < this->c_delay; ++i) {
+			r = this->ct->advance(instr);
+			// check response
+			CHECK(r == WAIT);
+		}
+		r = this->ct->advance(instr);
+		// check response
+		CHECK(r == OK);
+	}
+
+	int m_delay = 3;
+	int c_delay = 1;
+	std::vector<signed int> p;
+	Cache *c;
+	IF *f;
+	Controller *ct;
+};
+
+TEST_CASE_METHOD(IFPipeFixture, "fetch returns single instuction", "[if_pipe]")
+{
+	InstrDTO instr;
+	int expected_cycles;
+
+	expected_cycles = this->m_delay + this->c_delay + 2;
+	this->fetch_through(instr);
+
+	CHECK(instr.get_if_cycle() == expected_cycles);
+	REQUIRE(instr.get_instr_bits() == this->p[0]);
+}
+
+TEST_CASE_METHOD(IFPipeFixture, "fetch returns two instuctions", "[if_pipe]")
+{
+	InstrDTO instr;
+	int expected_cycles;
+
+	expected_cycles = this->m_delay + this->c_delay + 2;
+	this->fetch_through(instr);
+
+	CHECK(instr.get_if_cycle() == expected_cycles);
+	REQUIRE(instr.get_instr_bits() == this->p[0]);
+
+	expected_cycles += this->c_delay + 1;
+	this->fetch_cache(instr);
+
+	CHECK(instr.get_if_cycle() == expected_cycles);
+	REQUIRE(instr.get_instr_bits() == this->p[1]);
+}