summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
Diffstat (limited to 'src')
-rw-r--r--src/cli/cli.cc3
-rw-r--r--src/sim/controller.cc10
-rw-r--r--src/sim/ex.cc11
-rw-r--r--src/sim/id.cc139
-rw-r--r--src/sim/if.cc33
-rw-r--r--src/sim/instr.cc53
-rw-r--r--src/sim/instrDTO.cc26
-rw-r--r--src/sim/mm.cc10
-rw-r--r--src/sim/stage.cc36
-rw-r--r--src/sim/wb.cc11
-rw-r--r--src/storage/cache.cc4
-rw-r--r--src/utils/accessor.cc4
-rw-r--r--src/utils/response.cc2
-rw-r--r--src/utils/utils.cc10
14 files changed, 303 insertions, 49 deletions
diff --git a/src/cli/cli.cc b/src/cli/cli.cc
index 022b266..58575cb 100644
--- a/src/cli/cli.cc
+++ b/src/cli/cli.cc
@@ -3,6 +3,7 @@
#include "definitions.h"
#include "dram.h"
#include "response.h"
+#include "accessor.h"
#include "utils.h"
#include <iostream>
@@ -43,6 +44,7 @@ Cli::Cli()
};
commands['r'] = [this](std::vector<std::string> args) {
+ (void)args;
reset();
return;
};
@@ -61,6 +63,7 @@ Cli::Cli()
};
commands['h'] = [this](std::vector<std::string> args) {
+ (void)args;
help();
return;
};
diff --git a/src/sim/controller.cc b/src/sim/controller.cc
index 6d46dc4..17937eb 100644
--- a/src/sim/controller.cc
+++ b/src/sim/controller.cc
@@ -10,6 +10,8 @@ Controller::Controller(Stage *stage, Storage *storage, bool is_pipelined)
this->is_pipelined = is_pipelined;
this->pc = 0x0;
this->gprs = {0};
+ // grant side-door access
+ this->id = SIDE;
}
void Controller::run_for(int number)
@@ -17,7 +19,7 @@ void Controller::run_for(int number)
InstrDTO instr;
int i;
for (i = 0; i < number; ++i) {
- this->advance(instr);
+ this->advance(instr, OK);
}
}
@@ -27,11 +29,11 @@ std::array<int, GPR_NUM> Controller::get_gprs() { return this->gprs; }
int Controller::get_pc() { return this->pc; }
-Response Controller::advance(InstrDTO &i)
+Response Controller::advance(InstrDTO &next_instr, Response p)
{
Response r;
-
- r = this->next->advance(i);
+
+ r = this->next->advance(next_instr, p);
++this->clock_cycle;
return r;
}
diff --git a/src/sim/ex.cc b/src/sim/ex.cc
index 1de61d0..5b561f8 100644
--- a/src/sim/ex.cc
+++ b/src/sim/ex.cc
@@ -1,12 +1,9 @@
#include "ex.h"
+#include "accessor.h"
#include "instrDTO.h"
-#include "logger.h"
#include "response.h"
+#include "stage.h"
-static Logger *global_log = Logger::getInstance();
+EX::EX(Stage *stage) : Stage(stage) { this->id = EXEC; }
-Response EX::advance(InstrDTO &i)
-{
- global_log->log(INFO, "hello from execute!");
- return OK;
-}
+Response EX::advance(InstrDTO &next_instr, Response p) { return OK; }
diff --git a/src/sim/id.cc b/src/sim/id.cc
index df55fe2..e18ef14 100644
--- a/src/sim/id.cc
+++ b/src/sim/id.cc
@@ -1,12 +1,143 @@
#include "id.h"
+#include "accessor.h"
+#include "instr.h"
#include "instrDTO.h"
#include "logger.h"
#include "response.h"
+#include "stage.h"
-static Logger *global_log = Logger::getInstance();
+ID::ID(Stage *stage) : Stage(stage) { this->id = DCDE; }
-Response ID::advance(InstrDTO &i)
+Response ID::advance(InstrDTO &next_instr, Response p)
{
- global_log->log(INFO, "hello from decode!");
- return OK;
+ Response n;
+
+ this->advance_helper();
+ if (this->status == OK && p == OK) {
+ // mutual consent
+ this->curr_instr->set_time_of(this->id, this->clock_cycle);
+ next_instr = *this->curr_instr;
+ curr_instr = nullptr;
+ }
+
+ n = (p != OK || this->status != OK) ? BLOCKED : OK;
+ // the power of consent
+ n = this->next->advance(curr_instr, n);
+}
+
+void ID::get_instr_fields(
+ signed int &s1, signed int &s2, signed int &s3, Mnemonic &m)
+{
+ unsigned int type;
+ this->split_instr(s1, type, m);
+
+ switch (type) {
+ case 0b00:
+ this->decode_R_type(s1, s2, s3);
+ break;
+ case 0b01:
+ this->decode_I_type(s1, s2, s3);
+ break;
+ case 0b10:
+ this->decode_J_type(s1, s2);
+ break;
+ }
+}
+
+void ID::split_instr(signed int &raw, unsigned int &type, Mnemonic &m)
+{
+ unsigned int opcode, opcode_size;
+
+ type = GET_LS_BITS(raw, TYPE_SIZE);
+ opcode_size = (type == 0b0) ? R_OPCODE_SIZE : OPCODE_SIZE;
+ opcode = GET_MID_BITS(raw, TYPE_SIZE, TYPE_SIZE + opcode_size);
+ try {
+ m = instr::mnemonic_map.at((opcode << TYPE_SIZE) + type);
+ } catch (std::out_of_range const &) {
+ m = NOP;
+ }
+
+ raw = (unsigned int)raw >> (TYPE_SIZE + opcode_size);
+}
+
+Response ID::read_guard(signed int &v)
+{
+ Response r;
+ if (this->is_checked_out(v))
+ r = BLOCKED;
+ else {
+ r = OK;
+ v = this->dereference_register(v);
+ }
+ return r;
+}
+
+void ID::write_guard(signed int &v)
+{
+ this->checked_out.push_back(v);
+ v = this->dereference_register(v);
+}
+
+void ID::advance_helper()
+{
+ signed int s1, s2, s3;
+ Mnemonic m;
+
+ // it may be good to ensure we are not doing
+ // work that has already been done
+ if (this->curr_instr) {
+ s1 = curr_instr->get_instr_bits();
+ get_instr_fields(s1, s2, s3, m);
+ if (this->status == OK) {
+ curr_instr->set_s1(s1);
+ curr_instr->set_s2(s2);
+ curr_instr->set_s3(s3);
+ curr_instr->set_mnemonic(m);
+ }
+ }
+}
+
+void ID::decode_R_type(signed int &s1, signed int &s2, signed int &s3)
+{
+ unsigned int s0b, s1b, s2b;
+ Response r1, r2;
+
+ s0b = REG_SIZE;
+ s1b = s0b + REG_SIZE;
+ s2b = s1b + REG_SIZE;
+ s3 = GET_MID_BITS(s1, s1b, s2b);
+ s2 = GET_MID_BITS(s1, s0b, s1b);
+ s1 = GET_LS_BITS(s1, s0b);
+
+ r1 = this->read_guard(s1);
+ r2 = this->read_guard(s2);
+ this->write_guard(s3);
+
+ this->status = (r1 == BLOCKED || r2 == BLOCKED) ? BLOCKED : OK;
+}
+void ID::decode_I_type(signed int &s1, signed int &s2, signed int &s3)
+{
+ unsigned int s0b, s1b, s2b;
+
+ s0b = REG_SIZE;
+ s1b = s0b + REG_SIZE;
+ s2b = WORD_SPEC;
+ s3 = GET_MID_BITS(s1, s1b, s2b);
+ s2 = GET_MID_BITS(s1, s0b, s1b);
+ s1 = GET_LS_BITS(s1, s0b);
+
+ this->status = this->read_guard(s1);
+ this->write_guard(s2);
+}
+
+void ID::decode_J_type(signed int &s1, signed int &s2)
+{
+ unsigned int s0b, s1b;
+
+ s0b = REG_SIZE;
+ s1b = WORD_SPEC;
+ s2 = GET_MID_BITS(s1, s0b, s1b);
+ s1 = GET_LS_BITS(s1, s0b);
+
+ this->status = this->read_guard(*&s1);
}
diff --git a/src/sim/if.cc b/src/sim/if.cc
index deed8e1..7d3291b 100644
--- a/src/sim/if.cc
+++ b/src/sim/if.cc
@@ -2,18 +2,35 @@
#include "accessor.h"
#include "instrDTO.h"
#include "response.h"
+#include "stage.h"
-Response IF::advance(InstrDTO &i)
+IF::IF(Stage *stage) : Stage(stage) { this->id = FETCH; }
+
+Response IF::advance(InstrDTO &next_instr, Response p)
+{
+ this->advance_helper();
+ if (this->status == OK && p == OK) {
+ // mutual consent
+ ++this->pc;
+ this->curr_instr->set_time_of(this->id, this->clock_cycle);
+ next_instr = *this->curr_instr;
+ curr_instr = nullptr;
+ }
+ return this->status;
+}
+
+void IF::advance_helper()
{
Response r;
signed int bits;
- r = this->storage->read_word(this->id, this->pc, bits);
- if (r == OK) {
- ++this->pc;
- i.set_if_cycle(this->clock_cycle);
- i.set_instr_bits(bits);
+ if (this->curr_instr == nullptr) {
+ r = this->storage->read_word(this->id, this->pc, bits);
+ if (r == OK) {
+ this->status = r;
+ this->curr_instr = std::make_unique<InstrDTO>();
+ this->curr_instr->set_instr_bits(bits);
+ } else
+ this->status = STALLED;
}
-
- return r;
}
diff --git a/src/sim/instr.cc b/src/sim/instr.cc
new file mode 100644
index 0000000..08edf5e
--- /dev/null
+++ b/src/sim/instr.cc
@@ -0,0 +1,53 @@
+#include "instr.h"
+#include <functional>
+#include <map>
+#include <unordered_map>
+
+// clang-format off
+#define INIT_INSTRUCTION(mnemonic, body) \
+ {mnemonic, [](signed int &s1, signed int &s2, signed int &s3) { \
+ body; \
+ }}
+// clang-format on
+
+namespace instr
+{
+// clang-format off
+const std::unordered_map<Mnemonic, std::function<void(signed int &s1, signed int &s2, signed int &s3)>>
+ // clang-format on
+ instr_map = {
+
+ /* R type instructions */
+ // TODO these need to be WRAPPED with a function that sets overflow.
+ // future note to self, if these are more than 2 lines each, you're
+ // doing it wrong
+ INIT_INSTRUCTION(ADD, s3 = s1 + s2;),
+ INIT_INSTRUCTION(SUB, s3 = s1 - s2;),
+
+ /* I type instructions */
+
+ /* J type instructions */
+
+ /* NOP */
+ INIT_INSTRUCTION(NOP, (void)s3; (void)s2; (void)s1;),
+
+};
+
+const std::unordered_map<unsigned int, Mnemonic> mnemonic_map = {
+ {0b0000100, ADD}, {0b0001000, SUB}, {0b0001100, MUL},
+ {0b0010000, QUOT}, {0b0010100, REM}, {0b0011000, SFTR},
+ {0b0011100, SFTL}, {0b0100000, AND}, {0b0100100, OR},
+ {0b0101000, NOT}, {0b0101100, XOR}, {0b0110000, ADDV},
+ {0b0110100, SUBV}, {0b0111000, MULV}, {0b0111100, DIVV},
+ {0b1000000, CMP}, {0b1000100, CEV}, {0b000101, LOAD},
+ {0b001001, LOADV}, {0b0001101, ADDI}, {0b0010001, SUBI},
+ {0b0010101, SFTRI}, {0b0011101, SFTLI}, {0b0100001, ANDI},
+ {0b0100101, ORI}, {0b0101001, XORI}, {0b0101101, STORE},
+ {0b0110001, STOREV}, {0b0000101, CEV}, {0b0000101, LOAD},
+ {0b0001001, LOADV}, {0b0001001, LOADV}, {0b0000110, JMP},
+ {0b0001010, JRL}, {0b0001110, JAL}, {0b0010010, BEQ},
+ {0b0010110, BGT}, {0b0011010, BUF}, {0b0011110, BOF},
+ {0b0100010, PUSH}, {0b0100110, POP},
+
+};
+} // namespace instr
diff --git a/src/sim/instrDTO.cc b/src/sim/instrDTO.cc
index 6427b1a..5a7fe3b 100644
--- a/src/sim/instrDTO.cc
+++ b/src/sim/instrDTO.cc
@@ -1,15 +1,35 @@
#include "instrDTO.h"
+#include "accessor.h"
InstrDTO::InstrDTO()
{
- this->if_cycle = 0;
this->instr_bits = 0;
+ this->s1 = 0;
+ this->s2 = 0;
+ this->s3 = 0;
+ this->mnemonic = NOP;
}
-int InstrDTO::get_if_cycle() { return this->if_cycle; }
+int InstrDTO::get_time_of(Accessor a) { return this->hist[a]; }
signed int InstrDTO::get_instr_bits() { return this->instr_bits; }
-void InstrDTO::set_if_cycle(int cycle) { this->if_cycle = cycle; }
+signed int InstrDTO::get_s1() { return this->s1; }
+
+signed int InstrDTO::get_s2() { return this->s2; }
+
+signed int InstrDTO::get_s3() { return this->s3; }
+
+Mnemonic InstrDTO::get_mnemonic() { return this->mnemonic; }
+
+void InstrDTO::set_time_of(Accessor a, int i) { this->hist[a] = i; }
void InstrDTO::set_instr_bits(signed int instr) { this->instr_bits = instr; }
+
+void InstrDTO::set_s1(signed int s) { this->s1 = s; }
+
+void InstrDTO::set_s2(signed int s) { this->s2 = s; }
+
+void InstrDTO::set_s3(signed int s) { this->s3 = s; }
+
+void InstrDTO::set_mnemonic(Mnemonic m) { this->mnemonic = m; }
diff --git a/src/sim/mm.cc b/src/sim/mm.cc
index 28243e7..f394420 100644
--- a/src/sim/mm.cc
+++ b/src/sim/mm.cc
@@ -1,12 +1,12 @@
#include "mm.h"
-#include "logger.h"
-#include "response.h"
+#include "accessor.h"
#include "instrDTO.h"
+#include "response.h"
+#include "stage.h"
-static Logger *global_log = Logger::getInstance();
+MM::MM(Stage *stage) : Stage(stage) { this->id = MEM; }
-Response MM::advance(InstrDTO &i)
+Response MM::advance(InstrDTO &next_instr, Response p)
{
- global_log->log(INFO, "hello from memory!");
return OK;
}
diff --git a/src/sim/stage.cc b/src/sim/stage.cc
index 0d48774..62a7fd6 100644
--- a/src/sim/stage.cc
+++ b/src/sim/stage.cc
@@ -1,11 +1,43 @@
#include "stage.h"
+#include "utils.h"
+#include <array>
+#include <deque>
-Stage::Stage(Stage *next) {
+Stage::Stage(Stage *next)
+{
this->next = next;
+ this->curr_instr = nullptr;
+ this->status = OK;
+ this->checked_out = {};
}
+Stage::~Stage() { delete this->next; };
+
std::array<int, GPR_NUM> Stage::gprs;
-int Stage::pc;
+std::array<int, V_NUM> Stage::vrs;
+std::deque<signed int> Stage::checked_out;
+unsigned int Stage::pc;
Storage *Stage::storage;
bool Stage::is_pipelined;
int Stage::clock_cycle;
+
+signed int Stage::dereference_register(signed int v)
+{
+ signed int r;
+
+ if (v < 0 || v >= GPR_NUM + V_NUM) {
+ throw std::out_of_range(string_format(
+ "instruction tried to access register %d, which does "
+ "not exist",
+ v));
+ }
+
+ r = (v >= GPR_NUM) ? this->vrs[v % GPR_NUM] : this->gprs[v];
+ return r;
+}
+
+bool Stage::is_checked_out(signed int r)
+{
+ return std::find(this->checked_out.begin(), this->checked_out.end(), r) !=
+ this->checked_out.end();
+}
diff --git a/src/sim/wb.cc b/src/sim/wb.cc
index 9585fd3..bdea65a 100644
--- a/src/sim/wb.cc
+++ b/src/sim/wb.cc
@@ -1,12 +1,9 @@
#include "wb.h"
+#include "accessor.h"
#include "instrDTO.h"
-#include "logger.h"
#include "response.h"
+#include "stage.h"
-static Logger *global_log = Logger::getInstance();
+WB::WB(Stage *stage) : Stage(stage) { this->id = WRITE; }
-Response WB::advance(InstrDTO &i)
-{
- global_log->log(INFO, "hello from write back!");
- return OK;
-}
+Response WB::advance(InstrDTO &next_instr, Response p) { return OK; }
diff --git a/src/storage/cache.cc b/src/storage/cache.cc
index dccab47..80f59ef 100644
--- a/src/storage/cache.cc
+++ b/src/storage/cache.cc
@@ -69,7 +69,7 @@ Response Cache::process(
Response r = this->is_access_cleared(accessor, address);
if (r == OK) {
int tag, index, offset;
- get_bit_fields(address, &tag, &index, &offset);
+ get_cache_fields(address, &tag, &index, &offset);
request_handler(index, offset);
}
return r;
@@ -104,7 +104,7 @@ void Cache::handle_miss(int expected)
std::array<signed int, LINE_SIZE> *actual;
std::array<int, 2> *meta;
- get_bit_fields(expected, &tag, &index, &offset);
+ get_cache_fields(expected, &tag, &index, &offset);
r = OK;
meta = &this->meta.at(index);
actual = &this->data->at(index);
diff --git a/src/utils/accessor.cc b/src/utils/accessor.cc
index 86484c5..99347ed 100644
--- a/src/utils/accessor.cc
+++ b/src/utils/accessor.cc
@@ -3,6 +3,8 @@
std::ostream &operator<<(std::ostream &os, Accessor a)
{
- const std::string nameA[] = {"IDLE", "MEM", "FETCH", "L1CACHE", "SIDE"};
+ const std::string nameA[] = {
+ "IDLE", "WRITE", "MEM", "EXEC", "DCDE", "FETCH", "L1CACHE", "SIDE",
+ };
return os << nameA[a];
}
diff --git a/src/utils/response.cc b/src/utils/response.cc
index def6578..3d6e439 100644
--- a/src/utils/response.cc
+++ b/src/utils/response.cc
@@ -3,6 +3,6 @@
std::ostream &operator<<(std::ostream &os, Response r)
{
- const std::string nameR[] = {"OK", "WAIT", "BLOCKED"};
+ const std::string nameR[] = {"OK", "WAIT", "BLOCKED", "STALLED"};
return os << nameR[r];
}
diff --git a/src/utils/utils.cc b/src/utils/utils.cc
index 3a11c2c..e12a0e0 100644
--- a/src/utils/utils.cc
+++ b/src/utils/utils.cc
@@ -4,10 +4,9 @@
#include <string>
#include <vector>
-void get_bit_fields(int address, int *tag, int *index, int *offset)
+void get_cache_fields(int address, int *tag, int *index, int *offset)
{
- *tag = GET_MID_BITS(
- address, L1_CACHE_LINE_SPEC + LINE_SPEC, MEM_WORD_SPEC);
+ *tag = GET_MID_BITS(address, L1_CACHE_LINE_SPEC + LINE_SPEC, MEM_WORD_SPEC);
*index = GET_MID_BITS(address, LINE_SPEC, L1_CACHE_LINE_SPEC + LINE_SPEC);
*offset = GET_LS_BITS(address, LINE_SPEC);
}
@@ -28,8 +27,9 @@ const std::string string_format(const char *const zcFormat, ...)
return std::string(zc.data(), iLen);
}
-int wrap_address(int address) {
- if (address < 0){
+int wrap_address(int address)
+{
+ if (address < 0) {
return ((address % MEM_WORDS) + MEM_WORDS) % MEM_WORDS;
}
return address % MEM_WORDS;
generated by cgit v1.2.3 (git 2.39.1) at 2025-05-13 06:48:15 +0000