RISC-VECTOR.git - A simulator for the custom RISC-V[ECTOR] ISA written in C++

Age	Commit message (Expand)	Author
31 hours	Replaced STOREV with LOADV	bd
45 hours	Fix bug where too many vector elements were written back	bd
46 hours	Fix overflow/underflow conditions in vector ops	bd
46 hours	Separate ex advance into methods handling different field types	bd
2 days	Rename load/store vector to i_vector	bd
2 days	Add type field to InstrDTO, required for next refactor	bd
2 days	Fix issue where decode would overwrite raw bits while in use	bd
2 days	Further small simplifications	bd
2 days	Combine read_vec_guard and read_guard using templates	bd
2 days	Fix tests to use correct register indexes with vector addition	bd
4 days	Use templates rather than two write guard methods	bd
4 days	Move is_logical_type and is_vector_type to instr.h	bd
2025-04-28	Fix bug with pipeline blockage, swap DRAM delay to 100	bd
2025-04-27	Fix push/pop instruction	bd
2025-04-27	Bug fixes	Siddarth-Suresh
2025-04-27	Basic register display	bd
2025-04-27	Merge remote-tracking branch 'origin/master' into vector_ext	bd
2025-04-27	WB and MEM changes for vectors	Siddarth-Suresh
2025-04-26	Fix for load and store vector	Siddarth-Suresh
2025-04-26	Initial vector extension changes	Siddarth-Suresh
2025-04-25	Pass full DTO to GUI	bd
2025-04-24	Template files for vectors to override arithmetic operations	Siddarth-Suresh
2025-04-23	Rename Response.WAIT to READY, delete BLOCKED	bd
2025-04-23	Move dum class to tests folder	bd
2025-04-22	Cleanup some imports	bd
2025-04-22	Remove 'type' field out of InstrDTO	bd
2025-04-22	Use a struct for InstrDTO	bd
2025-04-22	Add definition for size of vector register	bd
2025-04-22	Remove the accessor object	bd
2025-04-22	Fix bug where checking for multiplication overflow resulted in FPE	bd
2025-04-22	Properly set condition codes for all operations sub SHIFTs	bd
2025-04-21	add RET instruction	bd
2025-04-21	Merge remote-tracking branch 'origin/master' into gui-next	bd
2025-04-21	Add licensing information	bd
2025-04-19	GUI validate program	bd
2025-04-18	Keep track of squashed instructions in DTO object	bd
2025-04-17	Add option to turn off pipeline	bd
2025-04-17	HALT instruction... but it voids future stages' instructions	bd
2025-04-17	The pipeline says some things and there are numbers	bd
2025-04-17	Swap the source and destination registers for LOAD, final fix	bd
2025-04-17	Keep track of checked out in DTO to simplify wb cond logic (bug)	bd
2025-04-16	Fix a bug related to parsing immediates in decode	bd
2025-04-15	Added pipeline to GUI	Siddarth-Suresh
2025-04-12	Add pipe_spec.h	bd
2025-04-12	Delete some more storage-only files	bd
2025-04-11	Move storage to a separate git repository.	bd
2025-04-01	Merge remote-tracking branch 'origin/master' into bdunahu	bd
2025-04-01	Finish adding initial tests for full pipeline	bd
2025-04-01	GUI and controller on separate threads	Siddarth-Suresh
2025-04-01	Lots of fixes and tests	bd