| Age | Commit message (Expand) | Author |
|---|---|---|
| 45 hours | Fix issue where decode would overwrite raw bits while in use | bd |
| 14 days | Fix bug with pipeline blockage, swap DRAM delay to 100 | bd |
| 2025-04-27 | Fix push/pop instruction | bd |
| 2025-04-27 | Basic register display | bd |
| 2025-04-23 | Rename Response.WAIT to READY, delete BLOCKED | bd |
| 2025-04-22 | Remove subfolders | bd |
 |
index : RISC-VECTOR.git | |
| A simulator for the custom RISC-V[ECTOR] ISA written in C++ | bd |
| summaryrefslogtreecommitdiff |