| Age | Commit message (Expand) | Author |
|---|---|---|
| 16 hours | Add ROTV instruction | bd |
| 25 hours | Add I_VECT field type for SRDL, SRDS, with two vector reg 1 general | bd |
| 26 hours | Remove I_VECT field types | bd |
| 26 hours | Replaced STOREV with LOADV | bd |
| 44 hours | Add type field to InstrDTO, required for next refactor | bd |
| 4 days | Move is_logical_type and is_vector_type to instr.h | bd |
| 2025-04-22 | Remove subfolders | bd |
 |
index : RISC-VECTOR.git | |
| A simulator for the custom RISC-V[ECTOR] ISA written in C++ | bd |
| summaryrefslogtreecommitdiff |