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2025-03-30untested ALU type R operationsbd
2025-03-30Setting condition code register, overflow guardbd
2025-03-30Minor simplification to API between pipeline componentsbd
2025-03-29Quick fix to fix compile-errorbd
2025-03-29Fix typo which allowed FETCH output to go to EXECUTEbd
2025-03-29Add advance logic for decodebd
2025-03-29Add tests for read/write guardsbd
2025-03-29Add proper read and write guard methods, clean up id test filebd
2025-03-29Fetch stage properly holds objects until parent is readybd
2025-03-29Add parameter to Stage::advance so status can transfer down the pipebd
2025-03-29Add implementation functions for checking out a register.bd
2025-03-29get_instr_fields return mnemonic rather than opcode and typebd
2025-03-28Move get_instr_fields, add all instruction mnemonicsbd
2025-03-28add get_instr_fields func to parse instruction fields from raw bitsbd
2025-03-27Use an unordered map to record pipe stage history on instructionsbd
2025-03-27Instr, InstrDTO gets/sets, other structures required for decodebd
2025-03-26Fix timing issues in fetch testsbd
2025-03-26Add fetch stage implementation, tests, program loading, DTO objectbd
2025-03-25Merge pull request #35 from bdunahu/bdunahuSiddarth Suresh
Add skeleton classes for 5 major pipeline stages Agree with different classes for each stage
2025-03-24Add skeleton classes for 5 major pipeline stagesbd
2025-03-24Added gui folder with its own CMake to house GUI+main.ccbd
2025-03-23Remove Python, combine main filesbd
2025-03-23Initial GUI CommitSiddarth-Suresh
2025-03-23Merge pull request #30 from bdunahu/bdunahubd
Add controller.h, implementation and tests.
2025-03-22Remove manual clock advancing / resolution from storage devicesbd
2025-03-22Initialize clock_cyclebd
2025-03-22Add controller.h, implementation and tests.bd
2025-03-21add 'process' function to handle boilerplate on every requestbd
2025-03-21Small cleanups to up a lot of inplementation detailsbd
2025-03-21Rewrite current cache.cc tests, add test-helper function to drambd
2025-03-20Rewrite all Dram tests to use Fixturebd
2025-03-20Make memory simulator an optional command, experiment with fixturesbd
2025-03-11Fix small issue in fetch_resource wih off by one cycle countbd
2025-03-11Fix issue where fetch_resource did not update cache databd
2025-03-11fix lots of bugsbd
2025-03-11Call memory wrapping functions properlybd
2025-03-11clarify macro names, implement load in CLI, fix many display issuesbd
2025-03-11Merge remote-tracking branch 'origin/master' into bdunahubd
2025-03-11Rename read/write to read_line and write_wordbd
2025-03-11remove operation.h and branch determined by read/write in cache loadbd
2025-03-11read has to wait until cache has the right line from memory after eviction, ↵Siddarth-Suresh
write only has to wait until eviction and does not care about line replacement in cache from memory
2025-03-11Tests for write line in Dram, memory address wrapping implementation and testsSiddarth-Suresh
2025-03-11Pad memory address output with trailing zerosbd
2025-03-11Clarify size of mem and cache in definitions, CLI print invalid tagsbd
2025-03-11Resolving conflictsSiddarth-Suresh
2025-03-11support for reading word, writing line to storage, dirty cache eviction, ↵Siddarth-Suresh
cache load
2025-03-11Write line, dirty cache eviction, cache load word/line (for future ↵Siddarth-Suresh
multilevel cache implementation)
2025-03-11fix namespace issues with match functionbd
2025-03-11cli display clock cycle, parse ';' delimited commandsbd
2025-03-10Remove problematic file-local logger in cli.ccbd
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