diff options
| author | bd <bdunahu@operationnull.com> | 2025-04-07 23:58:29 -0400 |
|---|---|---|
| committer | bd <bdunahu@operationnull.com> | 2025-04-07 23:58:29 -0400 |
| commit | 0fe2cc70abacc7c9e7aa2602836c8226bb1a1dc3 (patch) | |
| tree | 6d0b35edad95195221e55c976d944d19c46e6a58 /README.md | |
| parent | 1ba3929b633b35a2131960b5344359478594626a (diff) | |
Add label processing, mnemonic and label lookup maps
Diffstat (limited to 'README.md')
| -rw-r--r-- | README.md | 11 |
1 files changed, 2 insertions, 9 deletions
@@ -1,14 +1,6 @@ # rva - _/_/ _/_/ - _/ _/ - _/ _/ _/_/ _/ _/ _/_/_/ _/ - _/ _/_/ _/ _/ _/ _/ _/ - _/ _/ _/ _/ _/ _/ _/ - _/ _/ _/ _/_/_/ _/ - _/_/ _/_/ - -This is an assembler for the custom ISA nicknamed "RISC V[ECTOR]". It takes in an assembly program syntactically similar to MIPS (see input) and outputs a list of binary numbers corresponding to the instructions. This the output is compatible with the [RISC V[ECTOR]](https://github.com/bdunahu/RISC-V-ECTOR-) simulator. +This is an assembler for a custom ISA nicknamed "RISC V[ECTOR]". It takes in an assembly program syntactically similar to MIPS (see input) and outputs a list of binary numbers corresponding to the instructions. The output is compatible with the [RISC V[ECTOR]](https://github.com/bdunahu/RISC-V-ECTOR-) simulator. ## Dependencies @@ -27,4 +19,5 @@ Run `make` to produce a binary file in `/bin/`. To run the unit tests, run `make # About Created at the University of Massachusetts, Amherst + CS535 -- Computer Architecture and ISA Design
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