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authorbd <bdunahu@operationnull.com>2025-04-17 19:56:53 -0400
committerbd <bdunahu@operationnull.com>2025-04-17 19:56:53 -0400
commit984ce6eef2e439955ff991f90c2b654be7c6c3f3 (patch)
treee936781b52c6846d87c98381ed47bc7da7c43bff /src/sim/controller.cc
parent082200691a5d95f716a9d1dc127c858322cdff37 (diff)
Add option to turn off pipeline
Diffstat (limited to 'src/sim/controller.cc')
-rw-r--r--src/sim/controller.cc8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/sim/controller.cc b/src/sim/controller.cc
index 9ae6d16..db6106c 100644
--- a/src/sim/controller.cc
+++ b/src/sim/controller.cc
@@ -9,6 +9,7 @@ Controller::Controller(Stage *stage, Storage *storage, bool is_pipelined)
this->clock_cycle = 1;
this->storage = storage;
this->is_pipelined = is_pipelined;
+ this->is_empty = true;
this->pc = 0x0;
this->checked_out = {};
this->gprs = {0};
@@ -33,10 +34,6 @@ int Controller::get_clock_cycle() { return this->clock_cycle; }
std::array<int, GPR_NUM> Controller::get_gprs() { return this->gprs; }
-void Controller::set_gprs(int index, int value) { this->gprs[index] = value; }
-
-void Controller::set_pipelined(bool value) { this->is_pipelined = value; }
-
int Controller::get_pc() { return this->pc; }
InstrDTO *Controller::advance(Response p)
@@ -45,6 +42,9 @@ InstrDTO *Controller::advance(Response p)
r = this->next->advance(p);
++this->clock_cycle;
+ if (r)
+ this->is_empty = true;
+
return r;
}